Hardware assisted communication between processors

Details Hardware assisted communication between processors Hardware assisted communication between processors

2005-08-30

2005-08-30

Padmanabhan, Mano (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S112000, C711S161000, C711S162000, C714S006130, C714S006130, C707S793000, C709S238000, C709S246000, C709S250000, C719S330000

Reexamination Certificate

active

06938124

ABSTRACT:
A method and apparatus performs hardware assisted communication between processors. In response to direction from a first processor, a first coprocessor writes information in a first block of mirrored memory. Mirrored memory is maintained, allowing a second coprocessor to read the information from a second block of mirrored memory. The information is saved in memory accessible to a second processor. The information is accessed by the second processor.

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