Semiconductor device manufacturing: process – Chemical etching – Altering etchability of substrate region by compositional or...
Reexamination Certificate
2006-01-24
2006-01-24
Smith, Brad (Department: 2891)
Semiconductor device manufacturing: process
Chemical etching
Altering etchability of substrate region by compositional or...
C438S745000, C438S756000
Reexamination Certificate
active
06989331
ABSTRACT:
A method of removing a hard mask layer from a patterned layer formed over an underlying layer, where the hard mask layer is removed using an etchant that detrimentally etches the underlying layer when the underlying layer is exposed to the etchant for a length of time typically required to remove the hard mask layer, without detrimentally etching the underlying layer. The hard mask layer is modified so that the hard mask layer is etched by the etchant at a substantially faster rate than that at which the etchant etches the underlying layer. The hard mask layer is patterned. The patterned layer is etched to expose portions of the underlying layer. Both the hard mask layer and the exposed portions of the underlying layer are etched with the etchant, where the etchant etches the hard mask layer at a substantially faster rate than that at which the etchant etches the underlying layer, because of the modification of the hard mask layer.
REFERENCES:
patent: 6207517 (2001-03-01), Muller
patent: 6285057 (2001-09-01), Hopper et al.
patent: 6326300 (2001-12-01), Liu et al.
patent: 6573193 (2003-06-01), Yu et al.
Baylis Brian A.
Gopinath Venkatesh
Kamath Arvind
Lee Ming-Yi
Mirabedini Mohammad R.
LSI Logic Corporation
Luedeka Neely & Graham P.C.
Smith Brad
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