Hard mask patterns of a semiconductor device and a method...

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C257SE21305, C438S717000, C438S736000, C438S942000, C438S950000, C716S030000

Reexamination Certificate

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07892977

ABSTRACT:
In a method for forming hard mask patterns of a semiconductor device first hard mask patterns are formed on a semiconductor substrate. Second hard mask patterns are formed and include first patterns which are substantially perpendicular to the first hard mask patterns and second patterns which are positioned between the first hard mask patterns. Third hard mask patterns are formed between the first patterns.

REFERENCES:
patent: 2008/0113511 (2008-05-01), Park et al.
patent: 2009/0271758 (2009-10-01), Wells
patent: 1020040104417 (2004-12-01), None
patent: 100734464 (2007-06-01), None

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