Hard macro-to-user logic interface

Details Hard macro-to-user logic interface Hard macro-to-user logic interface

2007-05-14

2009-08-11

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S038000

Reexamination Certificate

active

07573295

ABSTRACT:
A hard macro-to-user logic interface of an integrated circuit is described. The integrated circuit includes a core as an application specific circuit block with a transaction interface of a first bit width and includes programmable logic capable of being programmed to instantiate user logic. The user logic has a user interface of a second bit width substantially less than the first bit width. A wrapper circuit couples the user interface and the transaction interface for coupling the core to the user logic.

REFERENCES:
patent: 5703498 (1997-12-01), Gould et al.
patent: 5781756 (1998-07-01), Hung
patent: 5857086 (1999-01-01), Horan et al.
patent: 5892961 (1999-04-01), Trimberger
patent: 6067595 (2000-05-01), Lindenstruth
patent: 6160418 (2000-12-01), Burnham
patent: 6204687 (2001-03-01), Schultz et al.
patent: 6241400 (2001-06-01), Melo et al.
patent: 6292021 (2001-09-01), Furtek et al.
patent: 6294925 (2001-09-01), Chan et al.
patent: 6340897 (2002-01-01), Lytle et al.
patent: 6522167 (2003-02-01), Ansari et al.
patent: 6792578 (2004-09-01), Brown et al.
patent: 6903575 (2005-06-01), Davidson et al.
patent: 6915365 (2005-07-01), Creta et al.
patent: 6976160 (2005-12-01), Yin et al.
patent: 7003423 (2006-02-01), Kabani et al.
patent: 7043570 (2006-05-01), Fry et al.
patent: 7126372 (2006-10-01), Vadi et al.
patent: 7190190 (2007-03-01), Camarota et al.
patent: 7200832 (2007-04-01), Butt et al.
patent: 7274213 (2007-09-01), Meyer et al.
patent: 7328335 (2008-02-01), Sundararajan et al.
patent: 7353162 (2008-04-01), Huang et al.
“PCI Express PIPE Endpoint LogiCORE Product Specification,” DS321 (v1.1), Apr. 11, 2005, pp. 1-14, Xilinx, Inc.
“PCI Express Endpoint Cores v3.4 Product Specification,” DS506, Feb. 15, 2007, pp. 1-20, Xilinx, Inc.
U.S. Appl. No. 11/803,516, filed May 14, 2007, Kolze, Paige A., et al., Configurable Interface, Xilinx, Inc. 2100 Logic Drive, San Jose, Ca 95124.
U.S. Appl. No. 11/803,522, filed May 14, 2007, Tran, Dai D., et al., Interface Device Reset, Xilinx, Inc. 2100 Logic Drive, San Jose, Ca 95124.
U.S. Appl. No. 11/803,556, filed May 14, 2007, McCarthy, Patrick C., et al., Interface Device Lane Configuration, Xilinx, Inc. 2100 Logic Drive, San Jose, Ca 95124.
U.S. Appl. No. 11/803,517, filed May 14, 2007, Case, Jerry A., Reconfiguration of a Hard Macro Via Configuration Registers, Xilinx, Inc. 2100 Logic Drive, San Jose, Ca 95124.

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