Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-09-04
2009-12-08
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
Reexamination Certificate
active
07631154
ABSTRACT:
A mechanism provided for controlling a transmission enable (TX_ENA) signal. The mechanism generates a queue of bits to track a sequence of commands and provides the transmit enable signal if the queue is empty. If an entry at a top of the queue indicates a write command, the mechanism provides the transmit enable signal for a predetermined number of cycles before the transmit enable signal is needed and until write data associated with the entry is transmitted, whereupon the entry is removed from the queue. If the entry at the top of the queue does not indicate a write command, the mechanism discontinues the transmit enable signal and removing the entry from the queue.
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Bataille Pierre-Michel
International Business Machines - Corporation
Talpis Matthew B.
Tkacs Stephen R.
Walder, Jr. Stephen J.
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