Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2003-05-28
2008-11-04
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S005110, C710S302000, C711S115000
Reexamination Certificate
active
07447943
ABSTRACT:
A system includes a mechanism to detect addition of a memory module. In response to the addition of the memory module, a memory test is run to test the new memory module for a defect. If an uncorrectable error is detected, a routine is activated to process the error. Depending on whether the defect occurred in the new memory module or existing memory module(s), different processing is performed.
REFERENCES:
patent: 6047343 (2000-04-01), Olarig
patent: 6098132 (2000-08-01), Olarig et al.
patent: 6401157 (2002-06-01), Nguyen et al.
patent: 6418492 (2002-07-01), Papa et al.
patent: 6487623 (2002-11-01), Emerson et al.
patent: 6549969 (2003-04-01), Hsu et al.
patent: 6651138 (2003-11-01), Lai et al.
patent: 2004/0199825 (2004-10-01), Zeller et al.
“Nonmaskable Interrupt” Microsoft Computer Dicitonary (fifth edition). Copyright 2002. Microsoft Press.
Haskell Darrell R.
Lester Robert A.
Majni Timoth W.
Vu Paul H.
Beausoliel Robert
Guyton Philip
Hewlett--Packard Development Company, L.P.
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