Halting clock signals to input and result latches in...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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Details

C712S213000, C712S214000, C712S226000

Reexamination Certificate

active

11095685

ABSTRACT:
A microprocessor includes a first cache memory, a first instruction fetch unit, a first instruction decoder, a first processing unit and a first latch that holds a control signal outputted from the first instruction decoder. When the first instruction fetch unit receives a first instruction performed by the first processing unit it outputs the first instruction to the first instruction decoder. When the first instruction fetch unit receives a second instruction which is not performed by the first processing unit, it outputs a specific instruction to the first instruction decoder, after which the supply of clock pulses to other latch circuits In the first processing unit is halted based on the control signal.

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