Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Including isolation structure
Reexamination Certificate
2002-07-01
2004-06-15
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Including isolation structure
C438S204000, C438S234000
Reexamination Certificate
active
06750109
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to diffusions in devices on high performance semiconductor integrated circuit chips. More particularly, it relates to halo implants for such integrated circuit chips.
2. Background of the Invention
Symmetric and asymmetric halo implants have been suggested to improve performance of low power short channel length field effect transistors (FET) by improving resistance to punch through. Symmetric halo implants are pockets of increased dopant concentration of the same conductivity type as the channel region in areas adjacent to the FET source and drain edges. Each of these FET halo implants is doped opposite to the adjacent source/drain diffusion. Asymmetric halo implants extend adjacent to either the source or the drain or they may extend differently adjacent the source than adjacent the drain. Halo implants may also extend into or under the channel region adjacent the source or drain edges. It is believed that further improvement of halo implants are attainable that will provide further improvement in device and chip performance, and one solution is provided by the following invention.
BRIEF SUMMARY OF THE INVENTION
It is an object of the present invention to avoid a halo implant on non-rectifying contacts of devices on chips having FET devices with halo implants.
It is a further object of the present invention to avoid a halo implant on non-rectifying contacts of gate conductor defined resistors, capacitors, lateral diodes, lateral SOI diodes, and FET body contacts on chips having FET devices with halo implants.
It is a feature of the present invention that no special mask is needed to avoid halo implants on non-rectifying contacts.
It is a another feature of the present invention that a lateral SOI gated diode, such as those used for overshoot/undershoot clamping, ESD protection, and temperature sensing, has no halo diffusion in one or both diffusion contacts.
It is an advantage of the present invention that the avoidance of halo implants on non-rectifying contacts improves series resistance and performance of devices on integrated circuits having FETs with halo implants.
It is another advantage of the present invention that the avoidance of halo implants on non-rectifying contacts improves yield of integrated circuit chips having FETs with halo implants.
These and other objects, features, and advantages of the invention are accomplished by a semiconductor chip, comprising a semiconductor substrate. A rectifying contact diffusion and a non-rectifying contact diffusion are in the substrate. A halo diffusion is adjacent the rectifying contact diffusion and no halo diffusion is adjacent the non-rectifying contact diffusion.
The structures are suitable for forming body contacts to FETs, lateral diodes, resistors, and capacitors on chips having FETs with halos adjacent source or drain diffusions. The structures are particularly suitable for SOI chips but may also be used for bulk silicon chips.
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patent: 5952695 (1999-09-01), Ellis-Monaghan et al.
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Culp James A.
Nayak Jawahar P.
Rausch Werner A.
Sherony Melanie J.
Voldman Steven H.
Canale Anthony J.
Pham Long
Trinh (Vikki) Hoa B.
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