Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2007-10-16
2007-10-16
Payne, David C. (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S354000, C375S371000, C375S373000
Reexamination Certificate
active
10801673
ABSTRACT:
A half-rate clock and data recovery (CDR) circuit includes a half-rate phase detector for detecting phases of an input signal and a half-rate clock, a charge pump circuit, a low-pass filter and a voltage controlled oscillator for feeding the half-rate clock back to the half-rate phase detector. The half-rate phase detector includes a one-pulse delay circuit for generating a delay of one pulse . The phase comparison polarity of the half-rate phase detector including the one-pulse delay circuit enables use of an N type LC voltage controlled oscillator as the voltage controlled oscillator.
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J. Savoj et al., “A 10Gb/s CMOS Clock and Data Recovery Circuit with Frequency Detection”,ISSC Digest of Technical Papers, Feb. 2001. pp. 78-79, 5(3), Los Angeles, CA.
File Erin M.
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Payne David C.
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