Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2006-05-23
2006-05-23
Burd, Kevin (Department: 2631)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C373S017000, C373S017000
Reexamination Certificate
active
07050524
ABSTRACT:
A half-rate clock and data recovery circuit includes a phase detector capable of operating at a half-rate, a charge pump circuit, a low pass filter, and a voltage controlled oscillator. The phase detector includes a selector circuit which receives uninverted and inverted signals from respective latches of the phase detector and an uninverted and inverted half-rate clock and outputs uninverted and inverted retimed signals supplied to the charge pump so that the charge pump produces a full-rate output in response to a half-rate input. The circuit provides greater operating margin.
REFERENCES:
patent: 6847789 (2005-01-01), Savoj
Nakamura, Kazuyoki et al.; “A 6 Gps CMOS Phase Detecting DEMUX Module Using Half-Frequency Clock”, Symposium on VLSI Circuits Digest of Technical Papers, p. 196 (1998).
“A 10-GB/S Linear Half-Rate CMOS CDR Circuit”, High-Speed CMOS Circuits for Optical Receivers, pp. 77-93.
Takasoh Jun
Ueda Kimio
Burd Kevin
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
Torres Juan Alberto
LandOfFree
Half-rate clock and data recovery circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Half-rate clock and data recovery circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Half-rate clock and data recovery circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3547567