Hafnium nitride gate dielectric

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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Details

C438S761000, C438S763000, C438S765000, C438S769000

Reexamination Certificate

active

06436801

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to semiconductor device structures and methods for forming such, and more specifically to such structures and methods related to gate dielectrics for field effect devices formed on integrated circuits.
BACKGROUND OF THE INVENTION
Semiconductor devices such as field effect transistors are common in the electronics industry. Such devices may be formed with extremely small dimensions, such that thousands or even millions of these devices may be formed on a single-crystal silicon substrate or “chip” and interconnected to perform useful functions in an integrated circuit such as a microprocessor.
Although transistor design and fabrication is a highly complex undertaking, the general structure and operation of a transistor are fairly simple. With reference to
FIG. 1
, a simplified field effect transistor is shown in cross-section. In a field effect transistor a portion of the substrate (or epi-layer)
100
near the surface is designated as the channel
120
during processing. Channel
120
is electrically connected to source
140
and drain
160
, such that when a voltage difference exists between source
140
and drain
160
, current will tend to flow through channel
120
. The semiconducting characteristics of channel
120
are altered such that its resistivity may be controlled by the voltage applied to gate
190
, a conductive layer overlying channel
120
. Thus by changing the voltage on gate
190
, more or less current can be made to flow through channel
120
. Gate
190
and channel
120
are separated by gate dielectric
180
; the gate dielectric is insulating, such that between gate
190
and channel
120
little or no current flows during operation (although “tunneling” current is observed with thin dielectrics). However, the gate dielectric allows the gate voltage to induce an electric field in channel
120
, giving rise to the name “field effect transistor.”
Generally, integrated circuit performance and density may be enhanced by “scaling”, that is by decreasing the size of the individual semiconductor devices on a chip. Unfortunately, field effect semiconductor devices produce an output signal that is proportional to the length of the channel, such that scaling reduces their output. This effect has generally been compensated for by decreasing the thickness of gate dielectric
180
, thus bringing the gate in closer proximity to the channel and enhancing the field effect.
As devices have scaled to smaller and smaller dimensions, the gate dielectric thickness has continued to shrink. Although further scaling of devices is still possible, scaling of the gate dielectric thickness has almost reached its practical limit with the conventional gate dielectric material, silicon dioxide. Further scaling of silicon dioxide gate dielectric thickness will involve a host of problems: extremely thin layers allow for large leakage currents due to direct tunneling through the oxide. Because such layers are formed literally from a few layers of atoms, exacting process control is required to repeatably produce such layers. Uniformity of coverage is also critical because device parameters may change dramatically based on the presence or absence of even a single monolayer of dielectric material. Finally, such thin layers form poor diffusion barriers to impurities.
Realizing the limitations of silicon dioxide, researchers have searched for alternative dielectric materials which can be formed in a thicker layer than silicon dioxide and yet still produce the same field effect performance. This performance is often expressed as “equivalent oxide thickness”: although the alternative material layer may be thick, it has the equivalent effect of a much thinner layer of silicon dioxide (commonly called simply “oxide”). Many, if not most, of the attractive alternatives for achieving low equivalent oxide thicknesses are metal oxides, such as tantalum pentoxide, titanium dioxide, and barium strontium titanate.
Researchers have found formation of such metal oxides as gate dielectrics to be problematic. At typical metal oxide deposition temperatures, the oxygen ambient or oxygen-containing precursor required to form them tends to also oxidize the silicon substrate, producing an oxide layer at the interface between the substrate and the gate dielectric. The presence of this interfacial oxide layer increases the effective oxide thickness, reducing the effectiveness of the alternative gate dielectric approach. The existence of the interfacial oxide layer places an ultimate constraint on the performance of an alternative dielectric field effect device.
SUMMARY OF THE INVENTION
The present invention includes a semiconductor device structure utilizing either a hafnium nitride gate dielectric layer, and a method for making the same. This method also encompasses gate dielectrics formed from nitrides of mixtures of Hf and Zr. With the present invention, a hafnium (or hafnium-zirconium) nitride gate dielectric may be formed with a dielectric constant substantially higher than that of either conventional thermal silicon dioxide or silicon nitride dielectrics. Thus, the metal (Hf or Hf—Zr) nitride dielectric layer may be made substantially thicker than a conventional gate dielectric with equivalent field effect. Additionally, the presence of nitrogen, in at least a partial thickness of the gate dielectric, helps to prevent the diffusion of boron—such as from a boron-doped polysilicon gate electrode—to the channel region.
Conventional researcher wisdom has been to avoid nitrogen-based compounds for gate dielectrics. This aversion is partly based on the tendency of silicon nitride to reduce electron mobility in the channel. Additionally, integrated circuit manufacturing researchers tend to hesitate before investigating the addition of new materials, and especially material types, for mass produced integrated circuits. Additionally, the leakage current of hafnium nitride-for many Hf/N ratios—is significantly higher than the leakage current of many other approaches, such as SiO
2
and silicon nitride.
In spite of this discouragement, our investigations suggest that Hf
x
N
1−x
is stable next to Si for a wide range of ratios. However, the resistivity drops—with a corresponding increase in leakage current—as the percentage of Hf (or Hf—Zr) increases. For x>0.5, the leakage current appears to be too high to meet the requirements in the industry's roadmap for the future. In our preferred approach, where x is approximately 0.3, the leakage current meets the roadmap requirements, while providing a dielectric constant near 9 or 10. Also, For x≧0.3, then the hafnium nitride layer seems to remain amorphous, even if processed at temperatures up to 900 degrees C. These understandings and our research into understanding the silicon
itride interface has allowed us to recognize the usability of hafnium nitride gate dielectrics.
We also investigated dielectrics with a formula of (Hf
z
/Zr
1−z
)
x
N
1−x
. These compounds are also stable next to Si for a wide range of ratios. However, the (Hf—Zr)N dielectrics tend to exhibit higher leakage currents than a HfN dielectric with the same ratio x. We have found that the leakage current is acceptable for (Hf
z
/Zr
1−z
)
x
N
1−x
compounds with x=0.3 and z=0.8. Again the resistivity drops as the percentage of Hf—Zr increases.
In one aspect of this invention, a method of fabricating a semiconductor device is disclosed that includes providing a single-crystal silicon substrate, which usually includes structures, such as a channel region between a source and a drain; forming a metal nitride gate dielectric layer on the substrate, and forming a conductive gate overlying the gate dielectric layer. This metal can be hafnium, or a hafnium-zirconium mixture.
In one hafnium-based approach, the hafnium nitride dielectric layer is formed by forming hafnium on the substrate, and annealing the formed metal in a non-oxidizing atmosphere including nitrogen, such as atomic nitrogen or NH
3
to form

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