Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-10-30
2007-10-30
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
11027266
ABSTRACT:
A method and tool that capture, create, and integrate a clock specification to achieve a correct-by-construction design flow of a semiconductor product from a partially manufactured semiconductor platform. The clocking elements of the design flow are combined and displayed in a plurality of context-driven views. Within each view, details of the clock specification are presented in the context of the information. A user may zoom in/out through the plurality of views of the design flow for more or less detailed information. Each view can combine the logical, structural, architectural, cost, timing, and other features of the clock in a particular context. A user can zoom in to select and manipulate circuit elements. The user can then zoom out and the present invention determines how changes affect other clocks in the same or other modules and/or the same clock in other modules.
REFERENCES:
patent: 5867399 (1999-02-01), Rostoker et al.
patent: 6901562 (2005-05-01), Cooke et al.
patent: 6968514 (2005-11-01), Cooke et al.
Byrn Jonathan
Lindberg Grant
LSI Corporation
Siek Vuthe
Suiter Swantz PC LLO
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