Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate
2006-07-18
2006-07-18
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
C326S027000, C326S031000, C326S033000
Reexamination Certificate
active
07078931
ABSTRACT:
A GTL output structure having an active charging and discharging stage that actively restores internal nodes for slew rate control without the need to wait for a slow rise and fall RC time constant is disclosed herein. The novel GTL output structure includes an input stage connected to an RC network for providing slew rate control. The output stage connects between the RC network and a feedback network. The feedback network in includes an active charging stage for providing a charging current to the gate of the at least one transistor for a period of time to the value of a power supply rail and wherein the feedback network includes an active discharging stage for providing a discharge current from the gate of the at least one transistor to ground.
REFERENCES:
patent: 5694065 (1997-12-01), Hamasaki et al.
patent: 6433592 (2002-08-01), Ehben
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