Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate
Reexamination Certificate
1998-10-13
2001-04-03
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
C438S222000, C438S365000
Reexamination Certificate
active
06211042
ABSTRACT:
BACKGROUND OF THE INVENTION
I. Field of the Invention
The present invention relates to the integration of metal structures, typically wires, MOS gate electrodes, ground planes and the like into a matrix of single crystal semiconductor. An important purpose of the invention is to enable subsequent fabrication of integrated electronic devices comprised of monocrystalline, (as opposed to polycrystalline or amorphous) semiconductor and metal, along with such standard ingredients as dopants and grown or deposited insulators.
FIG. 1
give a schematic of such an incorporated metal structure. An advantageous aspect of such an integrated structure is that the metal structure is disposed underneath the monocrystalline semiconductor material in which devices will subsequently be fabricated.
This invention provides an epitaxy method for achieving structures such as those depicted in
FIG. 1
by providing a method to selectively grow an epitaxial semiconductor (e.g. Si or an alloy comprising Si, such as an alloy of the form Si
x
Ge
1-x
, where x is in the range of zero to one) overlayer film in the presence of the metal structure, even though the metal tends to be reactive towards the precursor gas (e.g. silane, SiH
4
or a mixture of silane and another Group IV hydride such as GeH
4
, germane) which comprises the semiconductor material (e.g. Si, Si
x
Ge
1-x
) for the growth of the epitaxial semiconductor (e.g. silicon, silicon germanium) layer. The method of selective epitaxy disclosed herein, which may be called “reactive metal selective epitaxy” or “RMSE”, is a fundamentally new process. It differs in three ways from the selective epitaxy commonly performed on Si in the presence of non-reactive insulators such as SiO
2
or Si
3
N
4
, which may be called “insulator selective epitaxy”, or ISE herein. First, the RMSE method disclosed herein employs different reaction conditions for its operation, conditions which are the opposite of those one would select for ISE. Second, the new RMSE method operates in spite of an unfavorable thermodynamic gradient which does not exist for ISE. Third, the success of the new RMSE method is believed to be caused by a fundamentally different mechanism arising from the relative rates of surface and bulk diffusion for reactive intermediates, which is irrelevant for ISE.
II. Prior Art
The purpose of this section is to emphasize the distinction between the inventive method, RMSE (reactive metal selective epitaxy), and the well established prior art of ISE.
Insulator selective epitaxy (ISE) may be used to grow epitaxial silicon films
3
up and over an insulator such as SiO2, disposed upon a Si substrate, as shown in FIG.
2
. For this purpose, two fundamentally different kinds of chemistries are used. The first type employs a silane for growth, either pure or diluted with hydrogen. The second, and preferred, practice is to add a halogen, typically chlorine, to the growth mixture by using a chlorinated silane in place of the silane. Only the first prior art method (silane-based) of ISE is appropriate for a direct comparison with RMSE.
In silane-based ISE a silane, or a silane mixed with hydrogen is flowed over a substrate at elevated temperature. The temperature must be sufficiently high for reactive dangling bonds to be present on the Si surface. These dangling bonds react with the silane, depositing silicon and liberating hydrogen. The minimum temperature to generate these active sites on the Si surface is about 550 C. At this temperature the probability for the silane, (or a species formed by a reaction among silane molecules in the gas phase or on the reactor walls) to decompose on the SiO2 surface is negligible, and selective epitaxy obtains. In practice, however, in order to increase the deposition rate of the epitaxial silicon, the process is run at temperatures as high as 750 C. However, at such temperatures the process is no longer very selective. Incubation times for the formation of polycrystalline nuclei can be as low as approximately one minute when the pressure of the silane is 10 mtorr. (see Katherine E. Violette et. al., Mat. Res. Soc. Symp. Proc. 334, 519 (1994)). This breakdown of selectivity at the higher temperatures necessary for rapid epitaxial growth can restrict the growth of epitaxial layers to thicknesses on the order of 0.05-0.1 microns. (see J. Murota et. al., Appl. Phys. Lett. 54, 1007 (1989), as well as K. Aketagawa and T. Tatsumi, J. Crystal Growth 11, 860 (1991)). In contrast, in the RMSE process the selectivity improves with increasing temperature in the 550 C to 750 C regime. In RMSE substrates can remain be processed for hours at 750 C without the formation of undesirable polycrystalline Si, and epitaxial layers several microns thick may be grown. Although the procedures for silane based ISE and the reactive metal selective epitaxy (RMSE) of the present invention bear a superficial similarity, they are fundamentally different processses because the metal surface reacts with the silane as an integral part of the successful RMSE process, while reaction of the silane with the insulator is only a prelude to the failure of the process. Moreover temperatures (e.g. 750 C) at which cause selectivity to fail within a matter of minutes for silane-based ISE are essential to the failure-free operation of RMSE.
Clearly, ISE using silanes is a marginal process at best, so in practice chlorinated silanes are used as a precursor. The temperature ranges and dependencies are much different than for silane-based ISE because a new factor is introduced. The Cl can etch away (remove into the gas phase) the incipient polysilicon nuclei from the SiO2, and this scavenging reaction requires high temperature (see Katherine E. Violette et. al., Mat. Res. Soc. Symp. Proc. 334, 519 (1994), supra). A detailed review of the various chemistries involved in ISE is given by S. M. Gates in Chemical Reviews 96 1519 (1996). In any event, no comparison between halogenated silane based ISE and RMSE is warranted because RMSE does not employ halogenated silanes. In fact, halogenated silanes would be highly undesirable for RMSE because of the reactivity of the metal with the halogen.
SUMMARY OF THE INVENTION
For the purposes of this application the term “metal” shall be taken to mean: 1) any of the metallic elements (elemental metals), or 2) any mixture of metallic elements, such as an alloy or intermetallic compound, provided that said mixture possesses the properties normally associated with metals. Specifically excluded from this definition of metal are certain compounds between elemental metals and non-metallic electronegative elements such as found in groups V and VI of the periodic table, e.g. oxygen, nitrogen, sulfur etc. . While certain of such compounds exhibit metallic conductivity, and are upon occasion referred to as “compound metals” or “metallic compounds” these are not substances to which we refer when employing the term “metal”.
Broadly, the present invention provides a method of forming an epitaxial layer of a semiconductor material over a structure disposed upon a surface of a semiconductor substrate, the structure comprising a metal characterized by a negative Gibbs free energy for the formation of a compound of said metal and said semiconductor material, the method comprising the steps of:
a) placing said substrate in a reactor vessel having a base pressure in the ultra high vacuum range,
b) bringing said substrate to an elevated temperature, and
c) flowing, over said substrate, a halogen-free precursor gas of molecules comprising said semiconductor material.
Preferably the elevated temperature should be sufficient for a blank clean substrate of the semiconductor material placed in the reactor and subjected to a flow of the halogen-free precursor gas to grow epitaxially on said blank clean substrate at a rate greater than 1.0 angstroms per minute.
The metal structure preferably comprises features characterized by dimensions of less than 2.0 microns.
According to a preferred embodiment, the metal of the structure is tungsten, the semiconductor materi
McFeely Fenton Read
Noyan Ismail Cevdet
Yurkas John Jacob
August Casey
International Business Machines - Corporation
Le Dung Ang
Nelms David
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