Grounding scheme for a high-speed data channel

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

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326 82, H03K 1716, H03K 19003

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active

061572055

ABSTRACT:
A technique for reducing jitter on a data channel utilized for transfer of data between components disposed on the channel. Instead of coupling a ground of the channel directly to a ground network of a chip containing the data transferring device, an impedance between the channel ground and a substrate is utilized to minimize the jitter.

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