Grounding method for eliminating process antenna effect

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

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438599, 438612, 438622, 438710, H01L 21443

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058175776

ABSTRACT:
A method for eliminating the antenna effect in the manufacture of an integrated circuit in a silicon substrate, wherein there are contact pad areas at the periphery of the integrated circuit and interconnection lines connecting the contact pad areas with the integrated circuit. This is achieved by grounding the contact pad areas to the silicon substrate; processing in a plasma environment that would normally produce electrical charge build-up at the gate oxide of the integrated circuit, but wherein the grounded contact pad areas eliminates the charge build-up; and disabling the grounding of the contact pad areas to retrieve the functioning of the integrated circuit.

REFERENCES:
patent: 5434108 (1995-07-01), Ko et al.
S. M. Sze, VLSI Technology, Ch. 5, Reactive Plasma Etching pp. 184-189, Ch. 6, Dielectric and Polysilicon Film Deposition, pp. 235-238, Ch. 9, Metallization pp. 386-391, McGraw-and Polysilicon Hill International Editions, 1988 Singapore.

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