Grounding and thermal dissipation for integrated circuit...

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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Details

C361S707000, C361S709000, C361S719000, C257S706000, C257S712000, C257S719000

Reexamination Certificate

active

06819566

ABSTRACT:

BACKGROUND OF INVENTION
This invention relates to improved electronic packages and in particular, improved methods and devices for providing grounding and thermal dissipation in such packages.
In the manufacture of electronic circuit assemblies, substrates or circuit boards contain electronic components, integrated circuits or chips, and other devices mounted thereon. The assemblies are then encapsulated into packages.
In a typical microelectronic chip package construction, a cover, plate or lid, which is usually electrically and thermally conducting, is attached, by means of adhesive, to a chip which has been previously joined to the substrate. In this description the terms cover, plate or lid are intended to be used interchangeably to refer to the same elements. The adhesive material is often thermally conductive. The adhesive is deposited on the chip and the lid is then placed in contact with the adhesive and the adhesive is subsequently cured to provide a permanent connection of the cover plate to the chip. This arrangement results in the cover plate providing protection for the chip and also acting as a heat sink to conduct unwanted heat away from the chip. Good thermal conductivity requires a thin, uniform adhesive bond layer between the lid and the chip.
For example, with reference to
FIG. 1
, a typical flip chip electronic ball grid array package
10
is shown. Chip
11
has a plurality of solder bumps
12
for connecting to corresponding pads (not shown) on a surface of substrate
13
. Solder balls
14
are provided on the underside of substrate
13
in order to attach the package to other circuitry on a substrate or circuit board. Chip
11
is electrically connected by means of the chip solder bumps
12
and conductive circuitry through substrate
13
to solder balls
14
in a well known manner. Chip
11
is sealed to substrate
13
by underfill
15
and possibly other encapsulating material as is known in the art. Cover plate or lid
16
is attached to the upper surface of chip
11
as shown by means of thermally conductive adhesive
17
. Typically, adhesive
17
is applied to the upper surface of chip
11
, lid
16
is placed thereon and the adhesive is subsequently cured. Lid
16
provides physical protection for chip
11
and also in conjunction with the thermally conductive adhesive
17
acts as a heat sink to dissipate unwanted heat that is generated by the electronic device or chip
11
. Good thermal conductivity between chip
11
and lid
16
requires adhesive
17
to be in the form of a relatively thin and uniform adhesive bond line between lid
16
and chip
11
.
Present day electronic circuitry components require the presence of radiation shielding or electromagnetic interference (EMI) protection, either to prevent radiation of electromagnetic waves from the active circuit components or to prevent interference to the components from external sources. In view of this requirement, it is sometimes desirable to electrically connect the lid to one or more ground connections existing on the substrate. Typically, conductive regions on the substrate are linked to ground pads, an electrically conductive adhesive is then applied to the pads and the conductive lid is placed on the chip so as to contact the conductive adhesive. Typically, the thermally conductive adhesive is applied to the chip and the electrically conductive adhesive is applied to the pads and the lid is attached to both of the adhesives at the same time, followed by a step of curing both of the adhesive materials. In order to accommodate construction tolerances for the electronic package, the design space between these ground pads and the lid is much greater than the desired thickness of the lid to chip layer for the thermally conductive adhesive. These differences demand the use of different types of adhesives with different rheological properties.
When attempting to simultaneously attach the lid to two different surfaces with two different adhesives, difficulties are typically encountered which require compromises in the lid to chip bond line thickness, or in other words, the thickness of the adhesive layer between the lid and the chip, lid to chip adhesive run-off, and excessive lid to ground pad adhesive spread are varied.
For example, referring to
FIG. 2
, the relatively simple structure of
FIG. 1
is reproduced showing a typical prior art arrangement for providing for both electromagnetic interference protection for chip
11
as well as minimizing electromagnetic radiation. Ground pad
18
as shown, for example, on the upper surface of substrate
13
, is electrically connected to ground potential as by circuitry through substrate
13
to one or more solder balls
14
, as is well known. Electrically conductive adhesive
19
connects ground pad
18
to lid
16
. Conventionally, electrically conductive material
19
is deposited on ground pad
18
in the same operation that the chip to lid adhesive
17
is deposited on chip
11
and then lid
16
is placed so as to contact both adhesive layers
17
and
19
at the same time followed by a step to cure both of the adhesives layers. As a result of physical tolerances required in the design of electronic packages, the space between ground pads
18
and lid
16
is much greater than the thickness of the lid to chip bond line between chip
11
and lid
16
. Thus, it is apparent that in the processes of attaching lid
16
to the two different surfaces, namely chip
11
and ground pad
18
, difficulties may be encountered such as the differences in the thickness of the lid to chip bond line between chip
11
and lid
16
or the run-off of adhesive
17
such that adhesive does not effectively remain on the surface of chip
11
or excess spreading of adhesive
19
.
As an alternative to the use of conductive adhesive for the connection of the lid to the ground pad, the lid to ground pad connection may be achieved with solder. In view of the relatively large spacing as described above, the use of solder demands a relatively large amount of solder to be pre-deposited on the lid or on the ground pads themselves. However, alignment must be somehow predetermined between the solderable regions as the bottom side of the lid is not visible and this blind bottom side of the lid is to be soldered to the substrate ground pads. Any variations in deposited solder volume may result in either incomplete or absent lid to chip bond line or incomplete or absent lid to ground pad connection and thereby preventing the cover plate from properly functioning as a heat sink or to provide EMI protection.
As had been previously described, the ground pad lid connection may be made out of solder and comparable difficulties are experienced with the use of solder instead of conductive adhesive, resulting in incomplete or absent connections between the lid to chip bond line, or the lid to ground pad connection.
SUMMARY OF INVENTION
The present invention is directed to eliminating the difficulties in attaching a cover plate to a microelectronic chip package as described above as well as other shortcomings resulting from existing technology. The present invention has the object to provide methods and electronic packages which alleviate the above drawbacks.
According to one aspect of the present invention there is provided an electronic package containing an electronic device and a cover plate for providing thermal dissipation and electrical shielding for said electronic device. The package comprises a substrate, at least one electronic device mounted on said substrate and said substrate has a contact thereon for connecting to ground potential. A cover is provided for said electronic device has an opening therein which is positionally aligned with the contact. A thermal connection is provided between said electronic device and said cover and an electrical connection is provided proximate to said opening in the cover and the contact on the substrate.
According to another aspect of the present invention there is provided a method for assembling an electronic package which includes an elec

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