Grounded body SOI SRAM cell

Details Grounded body SOI SRAM cell Grounded body SOI SRAM cell

2006-07-11

2006-07-11

Parker, Kenneth (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S347000, C257S350000, C257SE27112, C257SE21320, C257SE21561, C257SE21564

Reexamination Certificate

active

07075153

ABSTRACT:
A semiconductor memory device comprising: an SOI substrate having a thin silicon layer on top of a buried insulator; and an SRAM comprising four NFETs and two PFETs located in the thin silicon layer, each the NFET and PFET having a body region between a source region and a drain region, wherein the bodies of two of the NFETs are electrically connected to ground. Additionally, the bodies of the two PFETs are electrically connected to VDD.

REFERENCES:
patent: 5072286 (1991-12-01), Minami et al.
patent: 5145802 (1992-09-01), Tyson et al.
patent: 5162889 (1992-11-01), Itomi
patent: 5452247 (1995-09-01), Takao
patent: 5670388 (1997-09-01), Machesney et al.
patent: 5909618 (1999-06-01), Forbes et al.
patent: 6018172 (2000-01-01), Hidaka et al.
patent: 6177300 (2001-01-01), Houston et al.
patent: 6646305 (2003-11-01), Assaderaghi et al.

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