Ground noise isolation circuit for semiconductor memory device a

Details Ground noise isolation circuit for semiconductor memory device a Ground noise isolation circuit for semiconductor memory device a

1997-06-30

1999-05-04

Nelms, David

Static information storage and retrieval

Read/write circuit

Noise suppression

365207, G11C 702

Patent

active

059010983

ABSTRACT:
A semiconductor memory device having a ground noise isolation circuit which prevents the influence of noise which occurs due to ground bouncing which causes erroneous data reading of a memory cell. The ground noise isolation circuit generates a pulse signal having a predetermined width in accordance with a chip enable signal for controlling the output of a data output unit when the data output unit outputs data and by disconnecting a sense amplifier driving transistor during the generation of the pulse signal.

REFERENCES:
patent: 5479374 (1995-12-01), Kobayashi et al.
patent: 5617362 (1997-04-01), Mori et al.

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