Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2006-03-21
2006-03-21
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
Reexamination Certificate
active
07017088
ABSTRACT:
A method of generating a test vector pattern for an array, including determining a failure of a test of the array, defining a type of test vector pattern to generate using a graphical user interface, generating the test vector pattern, and testing the array using the test vector pattern. A test vector pattern generation tool, including an array, a test vector pattern, and a graphical user interface generating the test vector pattern. The array is tested using the custom test vector pattern.
REFERENCES:
patent: 5644581 (1997-07-01), Wu
patent: 6601205 (2003-07-01), Lehmann et al.
Kim Hong S.
Lin Kuan-yu J.
De'cady Albert
Kerveros James C.
Osha & Liang LLP
Sun Microsystems Inc.
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