Graphical programs with direct memory access FIFO for...

Details Graphical programs with direct memory access FIFO for... Graphical programs with direct memory access FIFO for...

2005-10-17

2009-10-20

Tsai, Henry W. H. (Department: 2184)

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

C710S100000, C710S001000

Reexamination Certificate

active

07606950

ABSTRACT:
A system and method for communicating between graphical programs executing on respective devices, e.g., a programmable hardware element and a controller. The system includes a first node representing a direct memory access structure, e.g., a first in, first out data structure (DMA FIFO), and a second node providing a controller interface to the DMA FIFO. A first portion of the DMA FIFO is implemented on the programmable hardware element, and a second portion of the DMA FIFO is implemented in memory of the controller. The first and second nodes are operable to be included respectively in first and second graphical programs, where the first graphical program, including the first node, is deployable to the programmable hardware element, where the second graphical program, including the second node, is deployable to the controller, and where the first and second graphical programs communicate via the DMA FIFO in cooperatively performing a specified task.

REFERENCES:
patent: 4821180 (1989-04-01), Gerety et al.
patent: 4914568 (1990-04-01), Kodosky et al.
patent: 5481741 (1996-01-01), McKaskle et al.
patent: 5485584 (1996-01-01), Hausman et al.
patent: 5634076 (1997-05-01), Garde et al.
patent: 5655151 (1997-08-01), Bowes et al.
patent: 6173438 (2001-01-01), Kodosky et al.
patent: 6219628 (2001-04-01), Kodosky
patent: 6573905 (2003-06-01), MacInnis et al.
patent: 6763515 (2004-07-01), Vazquez
patent: 6784903 (2004-08-01), Kodosky et al.
patent: 7024660 (2006-04-01), Andrade
patent: 7028222 (2006-04-01), Peterson et al.
patent: 2001/0020291 (2001-09-01), Kudukoli et al.
patent: 2003/0034998 (2003-02-01), Kodosky et al.
patent: 2005/0257194 (2005-11-01), Morrow
patent: 2006/0015862 (2006-01-01), Odom
patent: 2006/0041859 (2006-02-01), Vrancic
patent: 2006/0053211 (2006-03-01), Kornerup
patent: 1 004 085 (2003-08-01), None
Axis, AXIS ETRAX 100LX Designer's Reference, 2003, AXIS, pp. 7-1 through 7-24.
National Instruments, LabVIEW Fundamentals, Aug. 2005, National Instruments, pp. 1-165.
Steven S. Lumetta and David E. Culler; “Managing Concurrent Access for Shared Memory Active Messages”; IEEE Proceedings of the International Parallel Processing Symposium; Apr. 1998; pp. 272-278.
Michel Dubois and Christoph Scheurich; “Memory Access Dependencies in Shared-Memory Multiprocessors”; IEEE Transactions on Software Engineering; Jun. 1990; pp. 660-673; vol. 16, No. 6.
Narain H. Gehani; “Capsules: A Shared Memory Access Mechanism for Concurrent C/C++”; IEEE Transactions on Parallel and Distributed Systems; Jul. 1993; pp. 795-811; vol. 4, No. 7.
“LabVIEW Real-Time Module User Manual”; Apr. 2004 Edition; 72 pages; National Instruments Corporation.
International search report and written opinion for application No. PCT/US2006/041012 mailed Jun. 6, 2007.

Affiliated with

Also associated with

Rating

Graphical programs with direct memory access FIFO for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Graphical programs with direct memory access FIFO for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Graphical programs with direct memory access FIFO for... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4125339