Graph-based pattern matching in L3GO designs

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000

Reexamination Certificate

active

07814443

ABSTRACT:
A system and method for processing glyph-based data associated with generating very large scale integrated circuit (VLSI) designs. A system is provide that includes a system for defining variable patterns using a pattern description language to create a glyph layout; and a graph-based pattern matching system that can identify potential matches amongst variable patterns in the glyph layout.

REFERENCES:
patent: 7536664 (2009-05-01), Cohn et al.
patent: 2006/0036977 (2006-02-01), Cohn et al.
patent: 2009/0204930 (2009-08-01), Cohn et al.

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