Graded-junction high-voltage MOSFET in standard logic CMOS

Details Graded-junction high-voltage MOSFET in standard logic CMOS Graded-junction high-voltage MOSFET in standard logic CMOS

2006-12-05

2006-12-05

Munson, Gene M. (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S336000, C257S343000, C257S412000

Reexamination Certificate

active

07145203

ABSTRACT:
A high-voltage graded junction LDMOSFET includes a substrate of a first conductivity type, a well of the first conductivity type disposed in the substrate, a first region of a second conductivity type disposed in the well of the first conductivity type, a source terminal coupled to the first region of the second conductivity type, a well of the second conductivity type disposed in the substrate, a second region of the second conductivity type disposed in the well of the second conductivity type, a drain terminal coupled to the second region of the second conductivity type, a region of the first conductivity type disposed in the substrate, a body terminal coupled to the region of the first conductivity type, a graded-junction region formed of material of the first conductivity type separating the well of the first conductivity type and the well of the second conductivity type, the material of the first conductivity type in the graded-junction region doped at least an order of magnitude less than the wells, a dielectric layer disposed over the well of the first conductivity type, the graded-junction region and a portion of the well of the second conductivity type, a first isolator disposed in the well of the second conductivity type, the isolator including a dielectric material that is in contact with the dielectric layer, a second isolator disposed at least partially in the well of the second conductivity type, the second isolator including a dielectric material and isolating the second region of the second conductivity type from the region of the first conductivity type, and a gate disposed over the dielectric layer and a portion of the first isolator.

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