Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2002-12-06
2004-08-24
Parekh, Nitin (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S735000, C257S737000, C257S778000, C257S696000, C257S668000, C257S666000, C257S723000, C257S673000, C257S690000
Reexamination Certificate
active
06781225
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of Invention
This invention relates to integrated circuit (IC) module for packaging IC chips, in particular to ball-grid array IC chips.
(2) Description of the Related Art
In conventional packaging of integrated circuits (IC), protective glue is customarily used to seal the IC module to improve reliability.
FIG. 10
shows a typical prior art IC module. An IC chip
50
is mounted on a metal frame with extensions
56
as leads. The IC chip
50
is wire-bonded to the leads
56
. The IC chip
50
and the inner portions of the leads
56
are sealed in glue
54
. The application of glue requires extra processing step and is therefore not cost effective.
SUMMARY OF THE INVENTION
An object of this invention is to eliminate the use of glue in sealing an integrated circuit module. Another object of this invention is to reduce the cost of packaging an IC chip or chips. Still another object of this invention is to eliminate the use of glue in sealing a ball-grid-array IC chip. A further object of this invention is to eliminate the use of glue in sealing a stacked multiple IC chip module.
These objects are achieved by pressure sealing an IC module. The bottom balls of a ball-grid array chip are mated with a first set of pads, which are connected to a second set of pads along the periphery of the package with extended leads for external connection. A frame of insulating material is placed over the second set of pads to seal to package. Alternatively, the IC chip itself may be used to press the leads to the second set of pads. The vacant space between the two sets of pads may be back-filled with insulating material.
REFERENCES:
patent: 4862322 (1989-08-01), Bickford et al.
patent: 5438224 (1995-08-01), Papageorge et al.
patent: 5523622 (1996-06-01), Harada et al.
patent: 5877478 (1999-03-01), Ando
patent: 6236109 (2001-05-01), Hsuan et al.
patent: 6650019 (2003-11-01), Glenn et al.
Chen Wen-Hwa
Chiang Kuo-Ning
Tseng Kuo-Tai
ChipMOS Technologies Inc.
Lin H. C.
Parekh Nitin
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