Adhesive bonding and miscellaneous chemical manufacture – Delaminating processes adapted for specified product – Delaminating in preparation for post processing recycling step
Patent
1992-10-23
1994-05-17
Bueker, Richard
Adhesive bonding and miscellaneous chemical manufacture
Delaminating processes adapted for specified product
Delaminating in preparation for post processing recycling step
437231, 437228, H01L 21306, H01L 21465
Patent
active
053125126
ABSTRACT:
A method for planarizing the surface of a semiconductor device which employs spin on glass (SOG) and an etching operation to remove high portions of the SOG prior to a chemical metal polish (CMP) operation. The SOG is baked and cured before etching. Additional layers of SOG and etching operations may be employed as necessary. A thick encapsulating oxide layer is deposited over the SOG layer. For surface irregularities caused by metal lines, an insulating layer may be deposited over the surface before the SOG. Where an additional metal line is to be deposited on the surface, an additional insulating layer is deposited after the CMP operation. In the case of metal lines made of aluminum, provision is also made for preventing Hillock formations on the metal lines.
REFERENCES:
patent: 3928225 (1975-12-01), Schafer
patent: 4355454 (1982-10-01), Tasch, Jr. et al.
patent: 4400411 (1983-08-01), Yuan et al.
patent: 4433008 (1984-02-01), Schnable et al.
patent: 4455325 (1984-06-01), Razouk
patent: 4571366 (1986-02-01), Thomas et al.
patent: 4603468 (1986-08-01), Lam
patent: 4606114 (1986-08-01), Kraus
patent: 4628589 (1986-12-01), Sundaresan
patent: 4661177 (1987-04-01), Powell
patent: 4775550 (1988-10-01), Chu et al.
patent: 4826786 (1989-05-01), Merenda et al.
patent: 4835113 (1989-05-01), Celler et al.
patent: 4837179 (1989-06-01), Foster et al.
patent: 4891331 (1990-01-01), Rapp
patent: 4983546 (1991-01-01), Hyun et al.
patent: 4986878 (1991-01-01), Malazgirt et al.
patent: 4996168 (1991-02-01), Ozaki et al.
patent: 5024959 (1991-06-01), Pfiester
patent: 5047357 (1991-09-01), Eklund
patent: 5158898 (1992-10-01), Hayden et al.
patent: 5169491 (1992-12-01), Doan
L. D. Molnar, "SOG Planarization Proves Better Than Photoresist Etch Back," Semiconductor International, Aug. 1989, pp. 92-96.
S. Wolf, Silicon Processing for the VLSI Era, vol. 2, Lattice Press, Sunset Beach, Calif., 1990, pp. 229-239.
Anonymous, "Planarization Process using spin-on-glass and polishing", Research Disclosure, Jun. 1991 RD-32635 p. 404.
Allman Derryl D. J.
Fuchs Kenneth P.
Bueker Richard
Fleck Linda J.
Martin Paul W.
NCR Corporation
LandOfFree
Global planarization using SOG and CMP does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Global planarization using SOG and CMP, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Global planarization using SOG and CMP will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-874301