Glitchless clock signal control circuit for a duplicated system

Multiplex communications – Wide area network – Packet switching

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Details

375108, H04Q 1104, H04L 700

Patent

active

046352490

ABSTRACT:
A control circuit for receiving clock signals from duplicated sources, such as a pair of Time Slot Interchanges (TSI) and for normally extending the clock signal of the on-line source to clock signal utilization devices, such as digital port boards. The control circuit contains circuitry which ensures that no spurious pulses are applied to the port boards when the TSIs interchange their on-line/off-line status.

REFERENCES:
patent: 4144448 (1979-03-01), Piscotta et al.
patent: 4386323 (1983-05-01), Jansen
patent: 4412342 (1983-10-01), Khan et al.
patent: 4563767 (1986-01-01), Brandt
patent: 4580259 (1986-04-01), Harada et al.

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