Generic, reduced state, maximum likelihood decoder

Details Generic, reduced state, maximum likelihood decoder Generic, reduced state, maximum likelihood decoder

2007-01-20

2010-11-09

Rizk, Sam (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C375S265000, C375S340000

Reexamination Certificate

active

07831892

ABSTRACT:
A decoder includes at least one programming input for a plurality of programmable reduced-state trellis parameters. A programmable device is connected to the at least one programming input and implements a reduced-state maximum likelihood decoder that is operable for processing a continuous phase modulated (CPM) signal and returning up to N bits that were transmitted based on a maximum likelihood and current winning super-state and corresponding survivor full-state. The programmable device calculates the path metrics for every super-state and determines a best path based on the reduced-state trellis parameters.

REFERENCES:
patent: 4462101 (1984-07-01), Yasuda et al.
patent: 5446758 (1995-08-01), Eyuboglu
patent: 5455839 (1995-10-01), Eyuboglu
patent: 6026121 (2000-02-01), Sadjadpour
patent: 6044111 (2000-03-01), Meyer et al.
patent: 6081562 (2000-06-01), He et al.
patent: 6154507 (2000-11-01), Bottomley
patent: 6690754 (2004-02-01), Haratsch et al.
patent: 7000175 (2006-02-01), Azadet et al.
patent: 7042938 (2006-05-01), Malkov et al.
patent: 7502418 (2009-03-01), Azadet et al.
patent: 2005/0268211 (2005-12-01), Haratsch
patent: 2006/0039492 (2006-02-01), Azadet et al.
patent: 2006/0068709 (2006-03-01), Hafeez
patent: 2006/026334 (2006-03-01), None
Eyuboglu et al., “Reduced-State Sequence Estimation with Set Partitioning and Decision Feedback,” IEEE Transactions on Communications, vol. 36, No. 1, Jan. 1988, pp. 13-20.
Svensson, “Reduced State Sequence Detection of Full Response Continuous Phase Modulation,” Electronics Letters, vol. 26, No. 10, May 10, 1990, pp. 652-654.
Norris, “Performance of MIL-STD-188-181C CPM SATCOM with Reduced State Demodulation,” IEEE Military Communications Conference, Oct. 23-25, 2006, pp. 1-4.
Hocevar et al,, “Achieving Flexibility in a Viterbi Decoder DSP Coprocessor,” IEEE Vehicular Technology Conference, vol. 5, Sep. 24-28, 2000, pp. 2257-2264.
Chadha et al., “A Reconfigurable Viterbi Decoder Architecture,” The 35thIEEE Asilomar Conference on Signals, Systems & Computers, vol. 1 of 2, Conf. 35, Nov. 4-7, 2001, pp. 66-71.

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