Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-05-22
2007-05-22
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
11008849
ABSTRACT:
Generation of a hardware interface specification for a software procedure. In one embodiment, an HDL description is generated for a first memory, at least one first state machine, a second memory, at least one second state machine, and an activation signal. The first memory stores input data corresponding to a plurality of data values consumed by the software procedure. The first state machine receives the input data and stores the input data in the first memory, and at least one of the at least one first state machines receives a plurality of the data values. The second memory stores output data corresponding to at least one data value produced by the software procedure. The second state machine reads the output data from the second memory and sends the output data.
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Edwards Stephen G.
Harris Jonathan C.
Miller Ian D.
Chiang Jack
Maunu LeRoy D.
Tat Binh
Xilinx , Inc.
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