Generating multiple traffic classes on a PCI Express fabric...

Details Generating multiple traffic classes on a PCI Express fabric... Generating multiple traffic classes on a PCI Express fabric...

2006-04-11

2006-04-11

Ray, Gopal C. (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S313000, C710S314000, C710S315000, C370S402000

Reexamination Certificate

active

07028130

ABSTRACT:
A system having a PCI Express fabric and PCI devices connected thereto transmits data from the PCI devices having PCI Express traffic classes assigned. A PCI Express to PCI bridge assigns a predetermined address to the grant line for each PCI device coupled to the PCI bus and stores this address along with the data from the PCI device in the PCI transaction queues. When the data is transmitted along the PCI Express fabric, or when it is processed within the PCI Express to PCI bridge, the address assigned to the respective grant line becomes the PCI Express traffic class for that data. This enables the commands from one device to be processed irrespective of commands from other PCI devices on the PCI bus.

REFERENCES:
patent: 5822612 (1998-10-01), Thomas et al.
patent: 5867480 (1999-02-01), Thomas et al.
patent: 6591299 (2003-07-01), Riddle et al.
patent: 6785760 (2004-08-01), Asselin
“Multi-ported PCI-to-PCi bridge chip” by Annamalai, K. (abstract only) Publication Date: Nov. 4-6, 1997.
PCI Express Base Specification, Rev. 1.0, Table 2-23: Ordering Rules Summary Table, pp. 98-99.
PCI Express Base Specification, Rev. 1.0, Virtual Channel (VC) Mechanism, pp. 101-106.
PCI Express Base Specification, Rev. 1.0, Virtual Channel Support, pp. 273-284.

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