Generating array bit-fail maps without a tester using...

Details Generating array bit-fail maps without a tester using... Generating array bit-fail maps without a tester using...

2005-12-20

2005-12-20

Tran, Andrew Q. (Department: 2824)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S718000, C714S726000, C714S733000, C714S042000, C714S045000, C365S201000, C365S230030, C365S156000, C365S189020

Reexamination Certificate

active

06978408

ABSTRACT:
An existing trace array on a chip is used to store the locations of bit failures from the automatic self-testing of an SRAM array. If a system is having problems, a technician can trigger the automatic test and then scan the trace array, thereby locating a large number of errors on the SRAM array very quickly.

REFERENCES:
patent: 4924466 (1990-05-01), Gregor et al.
patent: 5794175 (1998-08-01), Conner
patent: 6832342 (2004-12-01), Fields et al.

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