Generating a logic design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C703S014000, C703S015000

Reexamination Certificate

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06983427

ABSTRACT:
A technique to generate a logic design for use in designing an integrated circuit (IC). The technique includes embedding a combinatorial one-dimensional logic block within a two-dimensional schematic presentation to form a unified database. The technique also includes following a set of design capture rules, importing the combinatorial one-dimensional logic block, and notifying a designer when importing the combinatorial data block violates the set of design capture rules.

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