Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Reexamination Certificate
2011-08-16
2011-08-16
Wang, Albert (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Multiple or variable intervals or frequencies
C365S233100, C714S733000
Reexamination Certificate
active
08001411
ABSTRACT:
A method for generating a local clock domain within an operation includes steps of: receiving a clock frequency measurement for a slow portion of logic within the operation; generating a local signal to indicate commencement of the operation and to function as a clock gating signal; latching the clock gating signal to a selected cycle; generating clock domain controls based on the clock gating signal such that the operation times itscommencement on the selected cycle; and propagating the clock gating signal in ungated latches for a number of cycles, such that a second operation is restricted from being launched until the operation completes.
REFERENCES:
patent: 5256912 (1993-10-01), Rios
patent: 6442722 (2002-08-01), Nadeau-Dostie et al.
patent: 7518947 (2009-04-01), Starnes
Carey Sean Michael
Huott William Vincent
Jacobi Christian
Mayer Guenter
McNamara Timothy Gerard
Buchenhorner Michael
Campbell John E.
International Business Machines - Corporation
Wang Albert
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