Generating a function within a logic design using a dialog box

Details Generating a function within a logic design using a dialog box Generating a function within a logic design using a dialog box

2002-01-04

2004-03-16

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06708321

ABSTRACT:

TECHNICAL FIELD
This invention relates to circuit simulation.
BACKGROUND
Logic designs for circuits typically include either schematic design or text design. A schematic design shows a circuit design with logic elements as a two-dimensional diagram. Logic elements are either state elements (e.g., flip-flops, latches, etc.) or combinatorial elements (e.g., AND gates, NOR gates, etc.). State elements provide storage from one cycle of operation to the next cycle of operation. Combinatorial elements are used to perform operations on two or more signals.
A textual representation describes the logic elements of a circuit using one-dimensional text lines. Textual representations are used in hardware description languages (HDLs) which allow designers to simulate logic designs prior to forming the logic on silicon. Examples of such languages include Verilog and Very High-Level Design Language (VHDL). Using these languages, a designer can write code to simulate a logic design and execute the code in order to determine if the logic design performs properly.
Standard computer languages may also be used to simulate a logic design. One example of a standard computer language that may be used is C++.


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