General purpose shape-based layout processing scheme for IC...

Details General purpose shape-based layout processing scheme for IC... General purpose shape-based layout processing scheme for IC...

2000-08-02

2003-02-18

Smith, Matthew (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06523162

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to the field of photolithography, and more particularly to a system for applying modifications to an IC layout.
BACKGROUND OF THE INVENTION
Photomasks are used in the production of integrated circuits (ICs) to transfer a circuit layout (“IC layout”) onto a receiving substrate, such as a silicon wafer. A photomask is typically a glass plate covered by a thin chrome layer, in which a portion of the IC layout is etched. A source of light or radiation is used to expose this photomask pattern (“photomask layout”) onto, a layer of photosensitive resist on the surface of the wafer. The top surface of the wafer is then chemically etched away in the areas not covered by the photoresist, thereby completing the transfer of the original IC layout onto the wafer. This transference process is known as photolithography.
Photolithography is a critical step in the IC manufacturing process. The accuracy of the pattern formed on the wafer (“printed image”) significantly affects both process yield and IC performance. However, reliably resolving modern IC geometries in the 0.25-&mgr;m range and smaller using existing photolithography equipment is difficult. At such reduced feature sizes, optical distortion impedes exact transfer of the photomask pattern onto the wafer.
To counteract any unwanted deviations, a technique known as optical proximity correction (OPC) has been developed. OPC involves modification of the original IC layout to compensate for distortions introduced by the exposure process. The modification involves changing the dimensions of affected features or incorporating corrective features into the photomask pattern. For example, diffractive effects around small features in a photomask pattern can cause corner rounding in the printed image.
FIG. 1
a
shows a sharp corner
100
that would typically be present in an original photomask pattern, and a rounded corner
110
that would appear in the actual printed image without OPC.
FIG. 1
b
shows a corner
120
in a photomask pattern that has been modified using OPC to include an extra feature called a serif. The serif is sized such that the printed image corner
130
produced by photomask corner
120
has the desired form. Other OPC features (hammerheads, scattering bars, assist features, etc.) are well known in the art. These modifications to the original IC layout may sometimes be referred to generically as “biases” or “bias features”.
There are two methods for determining the appropriate biases to add to an IC layout: model-based OPC and rule-based OPC. Model-based OPC applies corrections to the IC layout and uses models of the photolithography processes to determine the most effective biases. By essentially simulating an actual photolithography step and converging on a solution, model-based OPC can provide a thorough and detailed set of biases to apply to the original layout. However, this technique is extremely computation-intensive due to the iterative nature of the process. Also, the accuracy of the final output is only as good as the models used in the calculations.
In contrast, rule-based OPC applies a set of geometry-based rules to the original IC layout. The rules are specified by the user, and define the biases to be incorporated in the photomask layout. Conventional rule-based OPC systems base the application of OPC biases on the geometries of edges within the original IC layout.
Although the complex patterns of an IC layout may seem to be made up of fine lines, even the thinnest of lines are actually 2-dimensional elements. As such, they can be represented by a series of contiguous edges, joined to other edges at distinct vertices. Conventional rule-based OPC systems evaluate each edge of the original IC layout and apply biases to those edges according to pre-specified rules. The rules are typically based upon the length of an edge and its spacing from other edges.
FIG. 2
a
shows a layout feature
200
a
, sometimes referred to as a “finger”, which is common in IC layouts. OPC modifications must often be applied to finger features to create photomask layouts that properly transfer the original feature during photolithography. Feature
200
a
comprises edges
221
,
222
,
223
,
224
, and
225
. The directions of edges
221
-
225
are as shown, and the inner sides of edges
221
-
225
are on the left.
FIG. 2
b
shows a printed image
200
b
that represents the printed image produced by a photolithography step using unmodified feature
200
a
in a photomask pattern. Printed image
200
b
shows undesirable corner rounding and shortening in region
230
. To compensate for such distortion, various OPC modifications can be incorporated into the photomask layout, depending on the specific dimensions of feature
200
a
and its relationship to the rest of the IC layout.
FIG. 2
c
shows a modified feature
200
c
, which includes a hammerhead
240
to correct for the distortions shown in
FIG. 2
b
.
FIG. 2
d
shows an alternative modified feature
200
d
, which includes serifs
250
as a corrective mechanism.
Determination of the appropriate OPC correction is made through the use of a bias table. Created prior to performing the OPC operation, the bias table defines the rules to be applied, each of which is a function of the edge properties. The bias table is typically structured as a look-up table, such as shown in Table 1.
TABLE 1
Edge-Based Bias Table
L
d
(&mgr;m)
(&mgr;m)
BIAS
<0.25
>1.5
Hammerhead
0.5 ± .05
1.0 ± 0.5
Serifs
Table 1 includes sample values for rules that would be applied to edge
223
of
FIG. 2
a
to create OPC features
240
and
250
, shown in
FIGS. 2
c
and
2
d
, respectively. In Table 1, “L” represents the length of edge
223
, and d represents the minimum spacing between edges (i.e., the distance between edge
223
and edges
221
and
225
). As indicated by the values in Table 1, if feature
200
a
is tall and thin (i.e., less than 0.25 &mgr;m wide and greater than 1.5 &mgr;m tall), then a hammerhead feature will be applied. However, if feature
200
a
is more squat (i.e., 0.5 &mgr;m wide and 1.0 &mgr;m tall), serifs will be added. Of course, the bias table would contain additional sizing and placement information for the varios biases.
Because a simple lookup table can be used, rule-based OPC is much more computationally efficient than model-based OPC. However, the current edge-based systems may be too limited to effectively provide corrections for complex layouts. For example, it may be desirable to apply (or not apply) different OPC modifications to edges that have similar properties.
FIG. 2
e
shows a feature
200
e
that includes an edge
263
. Edge
263
may have the same length and spacing as edge
223
in
FIG. 2
a
, but it may be desirable to apply OPC correction to only one of the two features. For example, feature
200
a
may be a non-critical feature that can tolerate substantial distortion, while feature
200
e
must be accurately transferred for proper IC function. If feature
200
a
was prevalent throughout the IC layout, it would be preferable to avoid complicating the final photomask layout by adding unnecessary OPC modifications. However, an edge-based system using a single edge is not able to readily make a distinction between edges
223
and
263
, and therefore would not be able to apply different OPC modifications to features
200
a
and
200
e.
Accordingly, it would be desirable to provide a system that enables greater flexibility and control in applying layout modifications.
SUMMARY OF THE INVENTION
Embodiments of the invention provide a system for applying layout processing to an IC layout (a portion of the layout or the entire layout) using a shape-based identification system. A shape can be defined as a set of associated edges. Therefore, a shape can provide much greater specificity than a single edge in identifying layout features of interest. A catalog of shapes can be defined and layout processing actions can be formulated based on the properties of the various shapes. Shapes can include various contiguous

Affiliated with

Also associated with

Rating

General purpose shape-based layout processing scheme for IC... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with General purpose shape-based layout processing scheme for IC..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and General purpose shape-based layout processing scheme for IC... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3160703