General purpose register file architecture for aligned simd

Details General purpose register file architecture for aligned simd General purpose register file architecture for aligned simd

2006-10-10

2006-10-10

Chan, Eddie (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Logic operation instruction processing

C711S201000

Reexamination Certificate

active

07120781

ABSTRACT:
A register file architecture in a general purpose digital signal processor (DSP) supports alignment independent SIMD (Single Instruction/Multiple Data) operations. The register file architecture includes a register pair and an alignment multiplexer. Two 32 bit grouped words may be loaded into the register pair. Each grouped word includes four 8 bit operands. The alignment state of the 32 bit words may be determined by the two least significant bits (LSBs) of the pointer addresses of the grouped words. These LSBs are used to control the alignment MUX to select n operands from the two 32 bit grouped words and output an aligned 32 bit grouped word to execution units for parallel processing.

REFERENCES:
patent: 4972260 (1990-11-01), Fujikawa et al.
patent: 5128759 (1992-07-01), Matsunaga
patent: 5179671 (1993-01-01), Kelly et al.
patent: 5307321 (1994-04-01), Sasai et al.
patent: 5309527 (1994-05-01), Ohki
patent: 5544251 (1996-08-01), Coelho
patent: 5566250 (1996-10-01), Coelho
patent: 5724275 (1998-03-01), Chung
patent: 5771368 (1998-06-01), Cmelik et al.
patent: 5922066 (1999-07-01), Cho et al.
patent: 5933650 (1999-08-01), van Hook et al.
patent: 5951677 (1999-09-01), Wolf et al.
patent: 5996057 (1999-11-01), Scales et al.
patent: 0 268 140 (1988-05-01), None
patent: 0 524 792 (1993-01-01), None
patent: 0 552 005 (1993-07-01), None
patent: 602886 (1994-06-01), None
patent: 04-021128 (1992-01-01), None
patent: 06-131248 (1994-05-01), None
patent: 07-013762 (1995-01-01), None
patent: 11-312085 (1999-11-01), None
Microsoft. Computer Dictionayr: The Comprehensive Standard for Business, School, Library, and Home. Second Edition. Microsoft Press®: Redmond, Washington ©1994. pp. 121-122.
Heuring, Vincent P. and Jordan, Harry F. Compuetr Systems Design and Architecture. Reading, Mass.: Addison Wesley Longman, Inc., ©1997. pp. 98-99, 184, and 497-499.
Kubo, Masanori (Japan Patent Office), Japanese Patent Application No. 2001-201406, Decision of Refusal, Feb. 7, 2006, 2 pages.
Kubo, Masanori (Japan Patent Office), Japanese Patent Application No. 2001-201406, Decision of Refusal, Feb. 7, 2006, 2 pages, English translation (not an offical translation).
Patent Abstracts of Japan, Japanese Publication No. 06-131248, 2 pages.
Publication No. JP06-131248, Machine translation of the Claims and Detailed Description, 8 pages (not an official translation).
Patent Abstracts of Japan, Japanese Publication No. 04-021128, 2 pages.

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