Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-08-17
2001-06-19
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S337000, C257S339000, C257S341000, C257S491000, C438S212000, C438S268000
Reexamination Certificate
active
06249023
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a gated semiconductor device having a field plate termination.
For MOS gated semiconductor devices such as field effect transistors, the standard method of termination is to continue source metal beyond the periphery of an active area of the device so as to form a field plate extending around the periphery of the device In an N-channel MOSFET, when a positive bias is applied to the drain whilst the gate and source are connected to the ground potential the transistor is in the forward-biased off state. This creates a depletion region which is brought to tie surface more gradually at the edge of the device than at the centre due to the presence of the field plate formed from the continuation of the source metal. This reduces the peak electric field at the periphery of the device, thus increasing the breakdown voltage.
One requirement of a MOSFET device is to connect the gate to a gate bond pad. The gate is normal made of polysilicon which has a significant resistance that combines with the device capacitance to create a time constant RC. In order to give acceptable switching characteristics it is thus necessary to break the source metal by distributing metal gate electrodes throughout the structure and/or around the periphery of the device. Some MOSFETs use a striped rather than a matrix polysilicon design, in which case the gate electrode may also be needed to connect the polysilicon gate stripes together. The larger the gate electrode area, the faster the switching, but also the higher the on resistance, and so there needs to be a trade-off between speed and resistance.
It is known to combine the functions of a field plate and a gate electrode by forming a conductive layer separated from the substrate by an insulating layer and extending around the active surface area between the field plate and gates which are positioned around the periphery of the active area. In this type of arrangement, the conductive layer and the peripheral gates may be formed from portions nf a single layer of polysilicon on which a field plate conductor is deposited.
These known devices in which the field plate and peripheral gates are interconnected can be damaged or destroyed however by electrostatic discharge or circuit transients. An electrostatic discharge (e.g. from a human being) can charge up the gate to a potential beyond its rupture voltage, thus destroying or irreparably damaging the insulating layer which separates the gate from the substrate.
BRIEF DESCRIPTION OF THE INVENTION
It is an object of the present invention to provide a gated semiconductor device which obviates or mitigates the above disadvantage.
According to the present invention, there is provided a gated semiconductor device comprising a substrate defining an active surface area including at least one source region, at least one gate formed adjacent to and insulated from the at least one source region, a source electrode in electrical contact with the source region, and a termination extending around the periphery of the active surface area, the termination comprising a gate electrode and a layer of conductive material electrically connected between the gate electrode and the said at least one gate, wherein the layer of conductive material is in electrical contact with the source electrode and incorporates at least one N-P junction defining a semiconductor breakdown diode located so as to be connected in series between tie gate electrode and tie source electrode.
Preferably, spaced apart portions of an outer edge of the source electrode electrically contact the conductive layer, openings are formed in the conductive layer spaced apart around the outer edge of the source electrode such that each said spaced apart portion of the source electrode edge is located between the openings of a respective pair of openings, and N-P junctions are formed in the conductive layer outside the outer edge of the source electrode such that each junction extends between and terminates at die openings of a respective one of the said pairs of openings.
The layer of conductive material and each gate to which the conductive material is connected may be formed from a single layer of polysilicon. The polysilicon layer may support a metal gate electrode. The polysilicon layer is preferably connected to a plurality of gates distributed adjacent the periphery of the active surface area of the substrate. Preferably a plurality of diodes are arranged in series between the gate electrode and the source electrode, the diodes being formed from successive sections of N and P type conductive materials.
An embodiment of the present invention will now be described by way of example with reference to the accompanying drawings, in which:
REFERENCES:
patent: 4567502 (1986-01-01), Nakagawa et al.
patent: 5430316 (1995-07-01), Contiero et al.
patent: 5557127 (1996-09-01), Ajit et al.
patent: 5959345 (1999-09-01), Fruth et al.
patent: 5973359 (1999-10-01), Kobayashi et al.
Kang Donghee
Thomas Tom
Zetex PLC
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