Gate structure

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257413, 257296, H01L 2976, H01L 2994, H01L 31062, H01L 31113, H01L 31119

Patent

active

061603015

ABSTRACT:
Methods are disclosed for the fabrication of novel polysilicon structures having increased surface areas to achieve lower resistances after silicidation. The structures are applicable, for example, to semiconductor interconnects, polysilicon gate, and capacitor applications. The inventive method provides additional means of obtaining suitable sheet resistivity and resistances for deep submicron applications. Techniques are disclosed for improving the conductivities of a silicided gate structure, a silicided interconnect structure, and capacitor component structures, each of such are situated on a substrate assembly, such as a semiconductor wafer.

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patent: 5616948 (1997-04-01), Pfiester
patent: 5698072 (1997-12-01), Fukuda
W.R. Hunter, et al., New Edge-Defined Etch Vertical-Etch Approaches for Submicrometer Mosfet Fabrication, IEEE, 1980, pp. 764-767.

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