Gate reuse methodology for diffused cell-based IP blocks in...

Details Gate reuse methodology for diffused cell-based IP blocks in... Gate reuse methodology for diffused cell-based IP blocks in...

2006-06-13

2006-06-13

Lin, Sun James (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07062739

ABSTRACT:
A method for re-using diffused cell-based IP blocks in a structured application specific integrated circuit comprising the steps of (A) implementing one or more blocks of intellectual property (IP) using a plurality of cell-based building blocks and (B) providing one or more alternative views for at least one of the one or more blocks of intellectual property.

REFERENCES:
patent: 5696943 (1997-12-01), Lee
patent: 6093214 (2000-07-01), Dillon
patent: 6453454 (2002-09-01), Lee et al.
patent: 6643840 (2003-11-01), Kumagai
Tsu-Wei Ku, Using ‘Empty Space’ for 1C Congestion Relief, EEdesign, Jun. 19, 2003.

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