Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Patent
1998-09-09
2000-01-04
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
257 57, 257 59, 257 72, H01L 2976, H01L 31036, H01L 2904
Patent
active
060112778
ABSTRACT:
A thin film field effect transistors and manufacturing method for the same are described. The channel region of the transistor is spoiled by an impurity such as oxygen, carbon, nitrogen. The photosensitivity of the channel region is reduced by the spoiling impurity and therefore the transistor is endowed with immunity to illumination incident thereupon which would otherwise impair the normal operation of the transistor. The spoiling impurity is not introduced into transistors which are located in order not to receive light rays.
REFERENCES:
patent: 4363828 (1982-12-01), Brodsky et al.
patent: 4460670 (1984-07-01), Ogawa et al.
patent: 4470060 (1984-09-01), Yamazaki
patent: 4500388 (1985-02-01), Ohmura et al.
patent: 4565584 (1986-01-01), Tamura et al.
patent: 4581476 (1986-04-01), Yamazaki
patent: 4584025 (1986-04-01), Takaoka et al.
patent: 4591892 (1986-05-01), Yamazaki
patent: 4621276 (1986-11-01), Malhi
patent: 4659392 (1987-04-01), Vasudev
patent: 4693759 (1987-09-01), Noguchi et al.
patent: 4729009 (1988-03-01), Ang
patent: 4743567 (1988-05-01), Pandya et al.
patent: 4755865 (1988-07-01), Wilson et al.
patent: 4760008 (1988-07-01), Yamazaki et al.
patent: 4766477 (1988-08-01), Nakagawa et al.
patent: 4772927 (1988-09-01), Saito et al.
patent: 4795679 (1989-01-01), Ramesh et al.
patent: 4814842 (1989-03-01), Nakagawa et al.
patent: 4818077 (1989-04-01), Ohwada et al.
patent: 4838654 (1989-06-01), Hamaguchi et al.
patent: 4849797 (1989-07-01), Ukai et al.
patent: 4864376 (1989-09-01), Aoki et al.
patent: 4885052 (1989-12-01), Fan et al.
patent: 4959700 (1990-09-01), Yamazaki
patent: 5037766 (1991-08-01), Wang
patent: 5043772 (1991-08-01), Yamazaki
patent: 5057889 (1991-10-01), Yamada et al.
patent: 5082351 (1992-01-01), Fergason
patent: 5132820 (1992-07-01), Someya et al.
patent: 5151689 (1992-09-01), Kabuto et al.
patent: 5236544 (1993-08-01), Yamagata
patent: 5247191 (1993-09-01), Yamazaki et al.
patent: 5250931 (1993-10-01), Misawa et al.
patent: 5261156 (1993-11-01), Mase et al.
patent: 5270224 (1993-12-01), Furumura et al.
patent: 5270567 (1993-12-01), Mori et al.
patent: 5281840 (1994-01-01), Sarma
patent: 5289030 (1994-02-01), Yamazaki et al.
patent: 5289300 (1994-02-01), Yamazaki et al.
patent: 5315132 (1994-05-01), Yamazaki
patent: 5349204 (1994-09-01), Yamazaki
patent: 5349226 (1994-09-01), Kawaguchi et al.
patent: 5372958 (1994-12-01), Miyasaka et al.
patent: 5383041 (1995-01-01), Yamazaki et al.
patent: 5402041 (1995-03-01), Kishino et al.
patent: 5404175 (1995-04-01), Nagae et al.
patent: 5418636 (1995-05-01), Kawasaki
patent: 5424752 (1995-06-01), Yamazaki et al.
patent: 5426526 (1995-06-01), Yamamoto et al.
patent: 5453858 (1995-09-01), Yamazaki
patent: 5481121 (1996-01-01), Zhang et al.
patent: 5500538 (1996-03-01), Yamazaki et al.
patent: 5514879 (1996-05-01), Yamazaki
patent: 5530266 (1996-06-01), Yonehara et al.
patent: 5539550 (1996-07-01), Spitzer et al.
patent: 5614732 (1997-03-01), Yamazaki
patent: 5712495 (1998-01-01), Suzawa
patent: 5744824 (1998-04-01), Kousai et al.
patent: 5851440 (1998-12-01), Tanaka et al.
VLSI Technology, Edited by S.M. Sze, McGraw-Hill Book Company, "Chapter 6 Dielectric and Polysilicon Film Deposition" A.C. Adams, pp. 233-235.
Scheid, et al., "Super Large Grain Polycrystalline Silicon Obtained From Pyrolysis of Si.sub.2 H.sub.6 and Annealing" Jap. J. Appl. Phys. vol. 29, No. 11, Nov. 1990, pp. L 2105-2107.
Blum et al. "Low Pressure CVD Process for Micro and Polycrystalline Silicon" IBM Technical Disclosure Bulletin vol. 26, No. 3A, Aug. 1983, pp. 921-922.
Madsen et al. "In Situ Doping of Silicon Films Prepared by Low Pressure Chemical Vapor Deposition Using Disilane and Phosphine" J. Electrochem. Soc., col. 137, No. 7, Jul. 1990, pp. 2246-2251.
Wolf et al., Silicon Processing for the VLSI Era, vol. 1: Process Technology, Lattice Press, Sunset Beach, CA (1986), pp. 175-176.
H, Ohshima et al., "Future Trends for TFT Integrated Circuits on Glass Substrates," IEDM (IEEE 1989), pp. 157-160.
Journal of Non-Crystalline Solids, vols. 59, 60, Dec. 1983, Part II, pp. 731-734, Proceedings of the Xth International Conference on Amorphous and Liquid Semiconductors, Tokyo, Jap., Aug. 22-26, 1983, C.C. Tsai et al.
Solar Cells 2, (1980), Investigation of the Hydrogen and Impurity Contents of Amorphous Silicon by Secondary Ion Mass Spectrometry, Charles MaGee and David E. Carlson, RCA Laaboratories, Princeon, N.J., pp. 365-376.
The Physics of Hydrogenerated Amorphous Silicon I Structure, Preparation, and Devices, Edited by J.D. Joannopoulos and G. Lucovsky, Springer-Verlag, Berlin Heidelberg, New York, Tokyo 1984, pp. 8-9 & 38-41.
Hatalis et al., "High-Performance Thin Film Transistors in Low-Temperature Crystallized LPCVD Amorphous Silicon Films," IEEE Electron Device Letters, vol. EDL-8, No. 8, Aug. 1987, pp. 161-164.
"(Invited) Amorphous Silicon Transistors and Integrated Circuits" Masakiyo Matsumura, Japanese Journal of Applied Physics, vol. 22, (1983) Supplement 22-1, pp. 487-491.
Clark Jhihan B
Robinson Eric J.
Saadat Mahshid
Semiconductor Energy Laboratory Co,. Ltd.
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