Gate-coupled MOSFET ESD protection circuit

Details Gate-coupled MOSFET ESD protection circuit Gate-coupled MOSFET ESD protection circuit

2005-07-19

2005-07-19

Kang, Donghee (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S355000, C257S363000, C257S365000, C361S056000, C361S091200, C361S111000, C361S117000

Reexamination Certificate

active

06919602

ABSTRACT:
A gate-coupled MOSFET ESD protection circuit. The circuit has a gate-node potential controlled by an inverter and a timing control circuit. Unlike current-shunting ESD clamping devices that turn the MOSFET fully on during an ESD event, a pull-down element is included to form a voltage divider like circuit, such that the gate-node potential is limited to around 1 to 2 volts during a positive ESD transient event. Unlike GCNMOS (Gate-Coupled NMOS), the invention has better control of the transient gate potential for more effective triggering of the NMOS into snapback during an ESD event.

REFERENCES:
patent: 5508649 (1996-04-01), Shay
patent: 5978192 (1999-11-01), Young et al.

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