Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-07-12
2005-07-12
Ngô, Ngân V. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S476000
Reexamination Certificate
active
06917082
ABSTRACT:
A gate-body cross-linked metal-oxide-semiconductor transistor circuit is provided for use in integrated circuits. The circuit has parallel metal-oxide-semiconductor transistors. The sources of the transistors serve as circuit inputs and the drains of the transistors are tied together to form an output. Complementary control signals are applied to the gates of the transistors, so that one transistor is turned on when the other transistor is turned off. Schottky diodes are used to cross-link the transistors. Each Schottky diode has an anode formed from a transistor body and a cathode connected to a gate.
REFERENCES:
patent: 5990521 (1999-11-01), Horiuchi
patent: 6700793 (2004-03-01), Takagawa et al.
patent: 6784487 (2004-08-01), Plikat
Andy Wei et al. “Design Methodology for Minimizing Hysteretic Vt-Variation in Partially-Depleted SOI CMOS” (c) 1997 IEEE in IEDM 97 pp. 411-414.
“SOI Technology: IBM's Next Advance in Chip Design” IBM Corporation (undated).
Ghavam G. Shahidi et al. “Partially-Depleted SOI Technology for Digital Logic,” 1999 IEEE International Solid-State Circuits Conference, IEEE 1999.
Jean-Luc Pelloie, SOI CMOS requires complex modeling http://www.eetimes.com/story/OEG20020923S0060 Sep. 23, 2002, EETIMES.
Vaughn Betz et al., “Circuit Design, Transistor Sizing and Wire Layout of FPGA Interconnect,” IEEE Custom Integrated Circuits Conference, 1999 pp. 1-4.
Koushik K. Das et al., “Circuit Style Comparison based on the Variable Voltage Transfer Characteristic and floating B Ratio Concept of Partially Depleted SOI” (undated) Sep. 17, 2002.
“CMOS Devices and Reliability—SOD Devices & Circuits (Session 16)” IEDM 1997.
Alan Joch “Silicon on Insulator”, Computerworld Dec. 18, 2000.
“Silicon On Insulator” Technology Article—Devient PC http://www.deviantpc.com/articles/SOI/index.shtml (Apr. 2003).
“SOI Circuit Design Concepts” pp 34, 35, and 196-209.
Robert Richmond, “Silicon-on-Insulator Technology” www.sysopt.com/articles/soi/index3.html Nov. 8, 2000.
“Silicon on Insulator”; http://www.okisemi.com/jp/english/bt-soi.htm Apr. 25, 2003.
Jacques Gautier et al., “SOI Floating-Body, Device and Circuit Issues”, IEDM 1997 pp 407-410.
J.P. Colinge et al., Potential of SOI for Analog and Mixed Analog-Digital Low-Power Applications, 1995 IEEE International Solid-State Circuits Conference (IEEE 1995).
Carlos Mazure et al., “ICs tailored for exotic substances”, EE Times, Sep. 23, 2002.
Andre Auberton-Herve, “SOI sharpens the leading edge as silicon scales to 90 nanometers”, EE Times Sep. 23, 2002.
Altera Corporation
Ngo Ngan V.
Treyz G. Victor
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