Gate array LSI

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

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257207, H01L 2710

Patent

active

055064280

ABSTRACT:
A gate array LSI having functional blocks formed by interconnecting a plurality of basic cells arranged on a semiconductor substrate in matrix form and either signal conductive patterns or first power conductive patterns. According to the gate array LSI, the first power conductive patterns are disposed on the plurality of basic cells arranged in line and are divided and disposed on the basic cells so as to interpose the signal conductive pattern therebetween. It is therefore possible to improve the efficiency of wiring macrocells.

REFERENCES:
Patent Abstracts of Japan, vol. 14, No. 216 (E-9024) May 8, 1990 & JP-A-02 051 252 (Toshiba Corp.) Feb. 21, 1990.

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