Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-12-30
2004-11-09
Quach, T. N. (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S660000, C438S686000
Reexamination Certificate
active
06815343
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor device fabrication, and more particularly to a method of incorporating a gaseous species such as hydrogen or deuterium into integrated circuit (IC) materials in order to passivate and/or neutralize defects which may occur at interfaces between a metal and an insulator, a metal and a semiconductor, a semiconductor and an insulator or a semiconductor and a metal. The present invention also relates to the incorporation of such gaseous species into IC materials in order to reduce or clean interfacial surfaces. The present invention further relates to novel structures to enhance this incorporation.
BACKGROUND OF THE INVENTION
High-density integrated circuits are composed of various layers of metals, insulators and semiconductors forming many highly complex interfaces. The term “interface” is used throughout the instant application to denote a surface forming a common boundary of two layers. The interface may be a continuous interface found across the entire wafer or, the interface may be a discontinuous interface found only in portions of the structure. A discontinuous interface could be exemplified as the interface formed between an unpatterned layer and a patterned layer, or two patterned layers. Defects and impurities, which are known to accumulate at these interfaces, oftentimes deteriorate the quality of the interface. In particular, the accumulation of defects and impurities at some interfaces may lower the barrier height causing increased current leakage in the IC. Moreover, charge, either fixed or mobile, can gather at some interfaces, such as, for example, the interface between Si and insulators deposited thereon, altering the ‘turn on’ voltage for any subsequent field effect devices utilizing the interface.
In the prior art, it has been found that annealing these circuits in hydrogen or its isotope deuterium can neutralize the effects of defects and impurities at Si/insulator interfaces by significantly decreasing the interfacial charge density. The hydrogen or deuterium is usually mixed with an inert gas such as argon or nitrogen in a ratio of about 5% hydrogen or deuterium with 95% nitrogen or argon. The resultant mixture is typically referred to in the art as a ‘forming gas’ and the annealing process is typically referred to in the art as a ‘forming gas anneal’. Such anneals are typically carried out at a temperature between 350° C. and 650° C. and are a major step in the fabrication of ICs.
Despite the known benefits of forming gas anneals to neutralize the interfacial defects and impurities present in ICs, prior art forming gas anneals are not efficient since it is difficult to incorporate atomic hydrogen into the sample. There is thus a need for developing a new and improved method that significantly improves the efficiency of the forming gas anneal incorporating more hydrogen or deuterium into the IC and at lower temperatures than conventional forming gas anneals. Reduced temperature is quite important in reducing the thermal budget that can be especially important in back-end-of-the-line (BEOL) applications.
SUMMARY OF THE INVENTION
The present invention provides a method of substantially reducing and/or eliminating the amount of defects and/or impurities that amass at interfacial surfaces that are present in a multilayer structure. Specifically, the inventive method improves the efficiency of a forming gas anneal by providing a multilayer structure having a catalytic layer formed thereon or buried therein which allows for a significant increase in the amount of hydrogen or deuterium which can be incorporated into the structure.
The inventive method is also conducted at a low temperature (on the order of about 400° C. or less).
Specifically, the method of the present invention comprises the steps of:
providing a multilayer structure having at least one interfacial surface;
forming a catalytic material atop said multilayer structure; and
annealing said multilayer structure including said catalytic material in a forming gas ambient and at a temperature of about 400° C. or less.
The catalytic material used in the present invention may be a catalytic film (or layer) or one or more catalytic particles. The catalytic material may be present atop the multilayer structure, or in some embodiments, one or more additional layers are formed over the catalytic material such that the catalytic material is buried within the structure. The catalytic material may be continuous across the entire multilayer structure, or it may be discontinuous appearing as an isolated island or region. The catalytic material may be a sacrificial material which is removed after annealing, or it may be a component of the multilayer structure that remains after processing has been completed.
The term “catalytic material” is used in the present invention to denote any material, such as a metal, which has a high affinity for absorbing hydrogen and deuterium, yet allows absorbed hydrogen and deuterium to readily desorb therefrom such that the amount of hydrogen or deuterium which gets incorporated into the interfacial regions of the multilayer structure is significantly increased. Illustrative examples of such catalytic material include metals selected from group VIB, VIIB, VIIIB and IB of the Periodic Table of Elements including alloys thereof. Highly preferred catalytic materials employed in the present invention are metals selected from group VIIIB, with Pd and Pt being most preferable.
The present invention also relates to a multilayer structure that is formed utilizing the method of the present invention. Specifically, the inventive structure comprises:
an annealed multilayer structure having at least one interfacial surface present therein, wherein said at least one interfacial surface contains a region of hydrogen or deuterium which substantially reduces defects and impurities present at said at least one interfacial surface.
The inventive structure described above may also include a conductive electrode either on a surface of the annealed multilayer structure or buried in the structure itself. The conductive electrode may be the catalytic material described above.
REFERENCES:
patent: 5907790 (1999-05-01), Kellam
patent: 6197631 (2001-03-01), Ishihara
patent: 6252270 (2001-06-01), Gregor et al.
patent: 6420236 (2002-07-01), Hu et al.
patent: 6436816 (2002-08-01), Lee et al.
patent: 2002/0031920 (2002-03-01), Lyding et al.
Baniecki John D.
Laibowitz Robert B.
Parks Christopher C.
Shaw Thomas M.
Quach T. N.
Scully, Scott, Murphy and Presser
Trepp Robert M.
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