Gap-filling of O.sub.3 -TEOS for shallow trench isolation

Details Gap-filling of O.sub.3 -TEOS for shallow trench isolation Gap-filling of O.sub.3 -TEOS for shallow trench isolation

1997-05-01

1998-03-10

Fourson, George R.

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438437, 438702, 438763, 438789, H01L 2176

Patent

active

057260907

ABSTRACT:
An improved method of gap filling shallow trench isolation with ozone-TEOS is described. A pad oxide layer is provided over the surface of a semiconductor substrate. A nitride layer is deposited overlying the pad oxide layer. A plurality of isolation trenches is etched through the nitride and pad oxide layers into the semiconductor substrate. A thermal oxide layer is grown within the isolation trenches. A plasma enhanced SiH.sub.4 oxide layer is deposited over the nitride layer and over the thermal oxide layer within the isolation trenches and treated with N.sub.2 plasma. Thereafter, an ozone-TEOS layer is deposited overlying the plasma enhanced SiH.sub.4 oxide layer and filling the isolation trenches. The ozone-TEOS layer and the plasma enhanced SiH.sub.4 oxide layer are polished away stopping at the nitride layer. This completes the formation of shallow trench isolation in the fabrication of the integrated circuit device.

REFERENCES:
patent: 5459108 (1995-10-01), Doi et al.
patent: 5518959 (1996-05-01), Jang et al.
patent: 5536681 (1996-07-01), Jang et al.
patent: 5665635 (1997-09-01), Kwon et al.
K. Kowk et al, J. Electrochem. Soc., "Surface Related Phenomena in Integrated PECVD/Ozone-TEOS SACVD Process for Sub-Half Micron Gap Fill: Electrostatic Effects", vol. 141, No. 8, Aug. 1994.

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