Gap count analysis for the P1394a BUS

Details Gap count analysis for the P1394a BUS Gap count analysis for the P1394a BUS

2007-12-10

2010-06-08

Rinehart, Mark (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

C710S100000, C710S105000, C370S230000, C370S228000, C370S389000, C725S090000

Reexamination Certificate

active

07734855

ABSTRACT:
A method of optimizing communication over a high-speed serial bus by minimizing the delay between packets transmitted over the bus is disclosed. The method comprises: calculating the round trip delay between PHYs connected on the bus by pinging; a bus manager sending a configuration packet to all PHYs connected on the bus, the configuration packet containing a minimum gap_count parameter value; and all PHYs connected on the bus sending packets over the bus using the minimum gap_count parameter value as a delay between packets.

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