Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2001-05-23
2004-10-26
Nguyen, T (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S004000, C711S104000, C711S105000, C711S170000
Reexamination Certificate
active
06810463
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an information processing device having engaged with, in a detachable manner, any one cartridge among a plurality of those each including memory varied in type, and central processing means therein operates in a mode corresponding to the engaged cartridge.
Further, the present invention relates to a storage device corresponding to the cartridge, in a multiplex bus transfer mode, engaged to such information processing device.
Still further, more specifically, the present invention relates to a game system ensuring compatibility among game software, and a game cartridge used for such game system. Compatibility can be successfully ensured by making the game cartridge applicable to both a first game machine of a conventional type and a second game machine higher in performance compared with the first. Such game machine is exemplified by a portable game machine engageable, in a detachable manner, with the game cartridge having a game program stored therein.
2. Description of the Background Art
With reference to
FIGS. 21
,
22
and
23
, described is a conventional information processing system by taking a game system as an example. First, as shown in
FIG. 21
, a conventional information processing system CGB is mainly composed of a program source
100
and a game machine
200
. The program source
100
stores information such as program necessary for the game machine
200
to display images and execute a game, and is structured to be engageable to the game machine
200
in a detachable manner.
The program source
100
is preferably in a form of cartridge including ROM
101
, and as required, RAM
102
, a clock
104
, and a memory bank controller
105
. The ROM
101
is exemplarily implemented by nonvolatile memory typified by read-only memory, flash memory, or EE-PROM, and fixedly stores a game program.
The ROM
101
also stores DOT data of an image representing a game character, for example, and as required, a program for data exchange among other game machines (not shown) and a program for ensuring compatibility with any program stored in other program sources (not shown) in the conventional image-display game devices. Hereinafter, the program source
100
is referred to as cartridge.
FIG. 23
shows an outer appearance of the cartridge
100
.
The RAM
102
is implemented by writable/readable memory typified by random-access memory, and has a region for storing temporary data relevant to the course of the game.
When a memory chunk of the ROM
101
is too large for a CPU in the game machine
200
, the memory bank controller
105
divides the memory chunk into a plurality of memory banks, and provides those to the ROM
101
as an upper address based on bank data provided from the CPU. Also to the RAM
102
, the memory bank controller
15
accesses in a similar manner. The ROM
101
, RAM
102
, and memory bank controller
105
are detachably connected to the game machine
200
via a connector
103
.
The game machine
200
is mainly composed of an operation key part
202
, a Central Processing Unit (CPU)
203
, a connector
204
, RAM
205
, a display controller
206
, a liquid crystal display
207
, an interface
208
, and a connector
209
. To the CPU
203
, the RAM
205
being working memory for temporarily storing data for game processing, and the display controller
206
are connected. To the display controller
206
, the liquid crystal display (LCD)
207
is connected. The CPU
203
is also connected with the connector
209
via the interface
208
. The connector
209
is connected to another connector
209
provided to other game machine
200
via a cable for game data exchange with an owner (player) thereof. Here, the CPU
203
is connected to the cartridge
100
via the connector
204
.
FIG. 22
shows the outer structure of the information processing system CGB. In the information processing system CGB, the connector
204
(
FIG. 21
) provided at the rear of the game machine
200
is engaged with the connector
103
(
FIG. 21
) of the cartridge
100
where memory is located. The operation key part
202
is located on the lower part of the surface (plane) of a housing
201
of the game machine
200
. And on the upper part thereof, the liquid crystal display
207
is placed. In the housing
201
, a circuit board having the circuit components as shown in
FIG. 21
mounted thereon is accommodated.
The operation key
202
includes a direction switch
202
a
used to move a cursor or direct any character available for the player in desirable directions, an action switch
202
b
used for action command for the character, a start switch
202
c
, and a selection switch
202
d.
In such information processing system CGB, the CPU
203
is an 8-bit CPU. Accordingly, the ROM
101
, RAM
102
, memory bank controller
105
, and connector
103
are also structured in a data width of 8-bit specifications. Further, in the information processing system CGB in 8-bit specifications, the ROM
101
and RAM
102
are both driven by 5V. The data width herein means a signal width for all of a data signal, address signal, and control signal exchanged between central processing means such as CPU and memory.
Even in such structured information processing system CGB, the CPU needs to be higher in performance to answer back technology innovation in components typified by the CPU, for example, and users' increasing demand for higher processing capability. As a result of such technology innovation, the current CPU is differed in processing bit from that in the information processing system CGB. As one example, the CPU currently carries out processing in 32-bit, and accordingly memory system is required to be the one in 32-bit specifications. Under such circumstances, the connectors
103
and
204
are preferably also in 32-bit specifications. Further, as the CPU becomes in higher in performance, a memory space available therefor needs to be increased (also increasing the number of bits of an address signal) in addition to increasing the number of processing bits. For example, the number of bits of an address signal in the CPU
203
of the conventional information processing system CGB is 16, while that in the CPU in the new information processing system is 24 in some cases. In such case, a memory system needs to correspond thereto, and so does a connector, preferably.
Further, with the advancing semiconductor technology, the information processing system of a newly-released type using a cartridge is generally equipped with an integrated circuit (IC) lower in power consumption. As a result, in the new information processing device, semiconductor memory such as ROM and RAM incorporated in the CPU and the cartridge may be driven by different voltage from that for the conventional. For example, the memory system in the information processing system CGB is driven by 5V, while the new-type information processing system is set to be driven by 3.3 V. Therefore, if a cartridge specifically developed for the information processing device low in driving voltage is used in the conventional higher in driving voltage, semiconductor memory in the cartridge suffers due to too much voltage applied thereto, resulting in memory corruption.
However, the conventional information processing system CGB has been used by a lot of users over many years, and various programs have been developed and supplied to the cartridges
100
. The issue here is, as described in the foregoing, in accordance with the new-type CPU higher in performance, the new-type information processing device shall adopt the bus transfer mode between the CPU and the memory, the connector in 32-bit specifications, and the memory system driven by 3.3V. Therefore, this new-type information processing device cannot utilize such programs supplied to the cartridges
100
which are huge software resources so far developed for the conventional information processing system CGB.
To get around this type of problem, such technique as disclosed in Japanese Patent Laid-Open Publicati
Nakashima Takanobu
Okada Satoru
Ota Masahiko
Umezu Ryuji
Yoneyama Kazuo
Nguyen T
Nintendo Co. Ltd.
Nixon & Vanderhye PC
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