Static information storage and retrieval – Read/write circuit – Differential sensing
Patent
1985-05-23
1987-05-12
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Differential sensing
365154, 365190, G11C 702
Patent
active
046655085
ABSTRACT:
The disclosure relates to the chip organization and circuit arrangement of a gallium arsenide MESFET memory for high speed, low power and radiation hard application. The memory is organized into several columns, each column having several memory cells and a sense amplifier. The write and read/sense data buses are placed at the input and output of the sense amplifier to provide better impedance matching to the write and read/sense circuits. The memory circuit as well as the output circuit utilize a combination of d-mode and e-mode gallium arsenide transistors in judicious arrangement to obtain low power requirements and reduced chip size relative to prior art gallium arsenide systems providing the same function and having the same general read access time.
REFERENCES:
patent: 4568957 (1986-02-01), Zuleeg et al.
patent: 4586166 (1986-04-01), Shah
Heiting Leo N.
Hoel Carlton H.
Popek Joseph A.
Sharp Melvin
Texas Instruments Incorporated
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