Gain cell type non-volatile memory having charge...

Details Gain cell type non-volatile memory having charge... Gain cell type non-volatile memory having charge...

2005-04-05

2005-04-05

Tran, Minhloan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S309000, C257S316000

Reexamination Certificate

active

06876023

ABSTRACT:
A semiconductor memory element subject to a threshold voltage controlling method other than those based on low leak currents or on the implantation of impurities. Such semiconductor elements are used to form semiconductor memory elements that are employed in scaled-down structures and are conducive to high-speed write operations thanks to a sufficiently prolonged refresh cycle. These semiconductor memory elements are in turn used to constitute a semiconductor memory device. A very thin semiconductor film is used as channels so that leak currents are reduced by the quantum-mechanical containment effect in the direction of film thickness. An amount of electrical charges in each charge accumulating region is used to change conductance between a source and a drain region of each read transistor structure, the conductance change being utilized for data storage. A channel of a transistor for electrically charging or discharging each charge accumulating region is made of a semiconductor film 5 nm thick at most. The arrangement affords both high-speed data write performance and an extended data retention time. The invention provides a high-speed, power-saving semiconductor device of high integration particularly advantageous for producing a small-scale system of low-power dissipation.

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Extended Abstracts of the 16th (1984) International Conference on Solid State Devices and Materials, Kobe 1984, pp. 265, “Tite Ram; A New SOI DRAM Gain Cell for M bit DRAM's” Shichijo, et al.*
Conference on Solid Devices and Materials, 1984, pp. 265-268.
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IEEE International Electron Devices Meeting, 1993, pp. 541-544.
K. Yano et al, IEEE International Solid-State Circuits Conference, 1996, pp. 266-267.

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