Fusible links formed on interconnects which are at least twice a

Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to nonconductive state

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438601, 438618, H01L 2182

Patent

active

060543396

ABSTRACT:
A shortened fuse link is disclosed. The fuse link comprises a first and second interconnect, with interconnects each being substantially longer than deep. The interconnects are disposed toward each other with a insulator region between them. A fusible conductor, spanning the insulator region, is attached at the top of the interconnects. The present device allows the length of the fusible conductor to be shortened, and results in a fuse link that can be consistently blown with a single laser pulse. Additionally, the fuse link can be used in a staggered layout. The staggered layout of parallel fuse links allows a high number of links in a relatively small area, with or without the use of tungsten barriers, and allows accessing all fuse links through a single fuse blow window.

REFERENCES:
patent: 4774561 (1988-09-01), Takagi
patent: 5618750 (1997-04-01), Fukura et al.
Stanley Wolf Ph.D. and Richard N. Tauber Ph.D. in Silicon Processing for the VLSI Era, vol. 1: Process Technology, Lattice Press, 1986.
Stanley Wolf Ph.D. in Silicon Processing for the VLSI Era, vol. 2: Process Integration, Lattice Press, 1990.
Minimum Groundrule, Electrically Blown Tungsten/Aluminum Fuse by Electromigration, IBM Technical Bulletin, vol. 31, No. 5, Oct. 1988.

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