Fuse selection of predecoder output

Details Fuse selection of predecoder output Fuse selection of predecoder output

1985-02-26

1988-01-19

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Bad bit

365 96, 371 11, G11C 1700, G11C 700, G06F 1100

Patent

active

047208171

ABSTRACT:
A fuse selectable decoder for a redundant row of memory elements in an array includes a redundant decode select circuit (38) for receiving predecoder inputs from predecode lines (28), (30), (32) and (34). The predecode lines are output from predecoders (20), (24) and (26) which decode an eight bit address word. The redundant decode select circuit (38) is programmed by fuse select circuit (40) that selects the address of a defective one of the rows of memory elements in an array (10). The redundant decode select circuit (38) selects one line out of each of the predecode lines (28), (30), (32) and (34) for input to an AND gate (112) for selecting the redundant row (12).

REFERENCES:
patent: 4051354 (1977-09-01), Choate
patent: 4598388 (1986-07-01), Anderson
patent: 4604727 (1986-08-01), Shah et al.

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